MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 140

• Manufacturer Part Number: MCHC908GR8AVFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Serial Communications Interface (SCI) Module
13.4.3.3 Data Sampling
The receiver samples the PTE1/RxD pin at the RT clock rate. The RT clock is an internal signal with a
frequency 16 times the baud rate. To adjust for baud rate mismatch, the RT clock is resynchronized at
the following times (see
To locate the start bit, data recovery logic does an asynchronous search for a 0 preceded by three 1s.
When the falling edge of a possible start bit occurs, the RT clock begins to count to 16.
To verify the start bit and to detect noise, data recovery logic takes samples at RT3, RT5, and RT7.
Table 13-2
Start bit verification is not successful if any two of the three verification samples are 1s. If start bit
verification is not successful, the RT clock is reset and a new search for a start bit begins.
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•
After every start bit
After the receiver detects a data bit change from 1 to 0 (after the majority of data bit samples at
RT8, RT9, and RT10 returns a valid 1 and the majority of the next RT8, RT9, and RT10 samples
returns a valid 0)
RT CLOCK
RT CLOCK
PTE1/RxD
SAMPLES
CLOCK
RESET
STATE
summarizes the results of the start bit verification samples.
RT
Figure
RT3, RT5, and RT7
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
QUALIFICATION
13-7):
Samples
Figure 13-7. Receiver Data Sampling
START BIT
000
001
010
011
100
101
110
111
Table 13-2. Start Bit Verification
VERIFICATION
START BIT
Verification
Start Bit
Yes
Yes
Yes
Yes
No
No
No
No
START BIT
SAMPLING
DATA
Noise Flag
0
1
1
0
1
0
0
0
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