MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 118

• Manufacturer Part Number: MCHC908GR8AVFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Input/Output (I/O) Ports
PTA3–PTA0 — Port A Data Bits
KBD3–KBD0 — Keyboard Inputs
12.2.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a 1
to a DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
DDRA3–DDRA0 — Data Direction Register A Bits
Figure 12-4
118
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
The keyboard interrupt enable bits, KBIE3–KBIE0, in the keyboard interrupt control register (KBICR)
enable the port A pins as external interrupt pins. See
These read/write bits control port A data direction. Reset clears DDRA3–DDRA0, configuring all port
A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
shows the port A I/O logic.
Address:
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Reset:
Read:
Write:
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
$0004
Bit 7
0
0
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Figure 12-3. Data Direction Register A (DDRA)
= Unimplemented
6
0
0
RESET
Figure 12-4. Port A I/O Circuit
5
0
0
NOTE
DDRAx
PTAx
4
0
0
Chapter 9 Keyboard Interrupt Module (KBI).
DDRA3
3
0
PTAPUEx
DDRA2
2
0
DDRA1
1
0
V
DD
INTERNAL
PULLUP
DEVICE
Freescale Semiconductor
DDRA0
Bit 0
PTAx
0