MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 201

• Manufacturer Part Number: MCHC908GR8AVFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.2 Features
Features of the TIM include:
17.3 Pin Name Conventions
The text that follows describes both timers, TIM1 and TIM2. The TIM input/output (I/O) pin names are
T[1,2]CH0 (timer channel 0) and T[1,2]CH1 (timer channel 1), where “1” is used to indicate TIM1 and “2” is
used to indicate TIM2. The two TIMs share three I/O pins with three port D I/O port pins. The full names
of the TIM I/O pins are listed in
17.4 Functional Description
Figure 17-1
that can operate as a free-running counter or a modulo up-counter. The TIM counter provides the timing
reference for the input capture and output compare functions. The TIM counter modulo registers,
TMODH:TMODL, control the modulo value of the TIM counter. Software can read the TIM counter value
at any time without affecting the counting sequence.
The two TIM channels (per timer) are programmable independently as input capture or output compare
channels. If a channel is configured as input capture, then an internal pullup device may be enabled for
that channel. See
Figure 17-3
Freescale Semiconductor
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Three input capture/output compare channels:
–
–
Buffered and unbuffered pulse-width-modulation (PWM) signal generation
Programmable TIM clock input with 7-frequency internal bus clock prescaler selection
Free-running or modulo up-count operation
Toggle any channel pin on overflow
TIM counter stop and reset bits
Rising-edge, falling-edge, or any-edge input capture trigger
Set, clear, or toggle output compare action
shows the structure of the TIM. The central component of the TIM is the 16-bit TIM counter
summarizes the timer registers.
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TCH0 may refer generically to
T1CH0 and T2CH0.
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TSC may generically refer to both
T1SC and T2SC.
12.5.3 Port D Input Pullup Enable Register.
Full TIM Pin Names:
TIM Generic Pin Names:
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Table
Table 17-1. Pin Name Conventions
17-1. The generic pin names appear in the text that follows.
TIM1
TIM2
NOTE
NOTE
PTD4/T1CH0
PTD6/T2CH0
T[1,2]CH0
PTD5/T1CH1
T[1,2]CH1
—
Features
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