MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 94

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MC68HC908LB8CPE

Manufacturer Part Number
MC68HC908LB8CPE
Description
IC MCU 8K FLASH 8MHZ 20DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LB8CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVR, POR, PWM
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LB8CPE
Manufacturer:
IR
Quantity:
10
High Resolution PWM (HRP)
The HRP comprises four blocks, as follows
The HRP can operate in two modes.
10.4.1 The Principle of Frequency Dithering
Frequency dithering is an averaging technique, which can increase the resolution of an output signal by
switching between two frequencies. By varying the time spent on each frequency, the average output
frequency will be a value between the two frequencies. For example, in
between 10 kHz and 20 kHz over a fixed cycle time. 30% of each cycle is spent at 20 kHz, 70% at 10 kHz.
The equivalent average frequency over time is 13 kHz.
94
1. A dual frequency generator, which generates a pair of complementary PWM output signals. It
2. A dithering controller, or timebase, which sets the dithering cycle time and the percentage of time
3. Two deadtime generators, for inserting deadtime into the output signals.
4. A set of control registers
1. Variable Frequency Mode: for variation of the output frequency at a fixed 50% duty cycle
2. Variable Duty Cycle Mode: for variation of the duty cycle at a fixed frequency.
allows dithering between two adjacent frequencies or duty cycles to increase the resolution of the
output signal. After deadtime insertion, these signals are routed to the TOP and BOT output pins
spent on each of the dithering frequencies or duty cycles.
REGISTERS
CONTROL
BUSCLK
Figure 10-3. Block Diagram of High Resolution PWM (HRP)
CONTROLLER
FREQUENCY
GENERATOR
DITHERING
DUAL
MC68HC908LB8 Data Sheet, Rev. 1
DEADTIME GENERATOR
DEADTIME GENERATOR
COMPLEMENTARY OUTPUTS
WITH PROGRAMMABLE DEADTIME
HRPCLK
SHUTDOWN DETECT INPUT
FOR FAST DISABLING
Figure 10-4
OF OUTPUTS
Freescale Semiconductor
a signal switches
TOP
BOT
SHTDWN

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