MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 101

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MC68HC908LB8CPE

Manufacturer Part Number
MC68HC908LB8CPE
Description
IC MCU 8K FLASH 8MHZ 20DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LB8CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVR, POR, PWM
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LB8CPE
Manufacturer:
IR
Quantity:
10
STEP[4:0] is read from register HRPPERL (if HRPMODE = 0) or from register HRPDCL (if HRPMODE =
1). See
varying the value of STEP[4:0], the programmer can vary the output signal.
10.4.8 Dithering Controller Timebase
The 5-bit counter may be clocked from the dual frequency generator counter or from a 16-bit timebase.
The clock source is selected by the CLKSRC bit in the HRPDCR register.
Clocking from the dual frequency generator sets the timebase for each dithering step equal to the period
of the HRP output waveform.
Clocking from the 16-bit timebase allows longer or shorter timebases to be used. This allows the system
designer to set the switching frequency to a certain value, to avoid undesirable harmonics or beat
frequencies.
Table 10-4
10.4.9 Deadtime Insertion
The deadtime generators receive the two output signals TOP and BOT from the dual frequency generator
block.
Deadtime is incorporated into these signals on each positive edge by delaying the positive edge for a
number of clock cycles. The number of clock cycles is equal to the value in the 8-bit HRP Deadtime
register HRPDT.
deadtime generators, the HRPDT register contents, and the outputs from the deadtime generators.
Freescale Semiconductor
10.4.4 Frequency Generation
shows the clock options and corresponding timebase values.
Figure 10-7
CLKSEL
0
1
shows the relationship between the TOP and BOT input signals to the
Table 10-4. Dithering Timebase Options
Dual Frequency Generator
MC68HC908LB8 Data Sheet, Rev. 1
for more detailed information on the HRPMODE bit. Thus, by
16 bit timebase
Clock Source
HRPTBH:HRPTBL
------------------------------------------------- -
Timebase
------------------------- -
HRPCLK
HRPCLK
P(10:0)
Functional Description
101

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