MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 74

• Manufacturer Part Number: MC68HC908LB8CPE
• Description: IC MCU 8K FLASH 8MHZ 20DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908LB8CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVR, POR, PWM
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Central Processor Unit (CPU)
74
BSET n,opr
BSR rel
CBEQ opr,rel
CBEQA #opr,rel
CBEQX #opr,rel
CBEQ opr,X+,rel
CBEQ X+,rel
CBEQ opr,SP,rel
CLC
CLI
CLR opr
CLRA
CLRX
CLRH
CLR opr,X
CLR ,X
CLR opr,SP
CMP #opr
CMP opr
CMP opr
CMP opr,X
CMP opr,X
CMP ,X
CMP opr,SP
CMP opr,SP
COM opr
COMA
COMX
COM opr,X
COM ,X
COM opr,SP
CPHX #opr
CPHX opr
CPX #opr
CPX opr
CPX opr
CPX ,X
CPX opr,X
CPX opr,X
CPX opr,SP
CPX opr,SP
DAA
DBNZ opr,rel
DBNZA rel
DBNZX rel
DBNZ opr,X,rel
DBNZ X,rel
DBNZ opr,SP,rel
Source
Form
Set Bit n in M
Branch to Subroutine
Compare and Branch if Equal
Clear Carry Bit
Clear Interrupt Mask
Clear
Compare A with M
Complement (One’s Complement)
Compare H:X with M
Compare X with M
Decimal Adjust A
Decrement and Branch if Not Zero
Operation
Table 7-1. Instruction Set Summary (Sheet 3 of 7)
MC68HC908LB8 Data Sheet, Rev. 1
A ← (A) – 1 or M ← (M) – 1 or X ← (X) – 1
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (X) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 2 + rel ? (A) – (M) = $00
PC ← (PC) + 4 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 3 + rel ? (result) ≠ 0
PC ← (PC) + 2 + rel ? (result) ≠ 0
PC ← (PC) + 4 + rel ? (result) ≠ 0
PC ← (PC) + 2; push (PCL)
SP ← (SP) – 1; push (PCH)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
A ← (A) = $FF – (M)
X ← (X) = $FF – (M)
(H:X) – (M:M + 1)
PC ← (PC) + rel
Description
SP ← (SP) – 1
M ← $00
H ← $00
M ← $00
M ← $00
M ← $00
(A) – (M)
(X) – (M)
A ← $00
X ← $00
Mn ← 1
C ← 0
I ← 0
(A)
10
V H I N Z C
U – –
– – – – – –
– – – – – – REL
– – – – – –
– – – – – 0 INH
– – 0 – – – INH
0 – – 0 1 –
0 – –
– – – – – –
– –
– –
– –
on CCR
Effect
1
Freescale Semiconductor
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR
IMM
IMM
IX1+
IX+
SP1
DIR
INH
INH
INH
IX1
IX
SP1
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
INH
INH
IX1
IX
SP1
IMM
DIR
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
INH
DIR
INH
INH
IX1
IX
SP1
9EE1
9ED1
9EE3
9ED3
9E6B
9E61
9E6F
9E63
1C
AD
8C
C1
D1
C3
D3
10
12
14
16
18
1A
1E
31
41
51
61
71
98
9A
3F
4F
5F
6F
7F
A1
B1
E1
F1
33
43
53
63
73
65
75
A3
B3
E3
F3
72
3B
4B
5B
6B
7B
dd
dd
dd
dd
dd
dd
dd
dd
rr
dd rr
ii rr
ii rr
ff rr
rr
ff rr
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
ff
ff
ii ii+1
dd
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd rr
rr
rr
ff rr
rr
ff rr
4
4
4
4
4
4
4
4
4
5
4
4
5
4
6
1
2
3
1
1
1
3
2
4
2
3
4
4
3
2
4
5
4
1
1
4
3
5
3
4
2
3
4
4
3
2
4
5
2
5
3
3
5
4
6