MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 120

• Manufacturer Part Number: MC68HC908LB8CPE
• Description: IC MCU 8K FLASH 8MHZ 20DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908LB8CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVR, POR, PWM
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Low-Voltage Inhibit (LVI)
The LVI is enabled out of reset. The LVI module contains a bandgap reference circuit and comparator.
Clearing the LVI power disable bit, LVIPWRD, enables the LVI to monitor V
reset disable bit, LVIRSTD, enables the LVI module to generate a reset when V
V
Once an LVI reset occurs, the MCU remains in reset until V
causes the MCU to exit reset. See
sequence.
The output of the comparator controls the state of the LVIOUT flag in the LVI status register (LVISR) and
can be used for polling LVI operation when the LVI reset is disabled.
12.3.1 Polled LVI Operation
In applications that can operate at V
the LVIOUT bit. In the configuration register, the LVIPWRD bit must be at 0 to enable the LVI module, and
the LVIRSTD bit must be at 1 to disable LVI resets.
12.3.2 Forced Reset Operation
In applications that require V
module to reset the MCU when V
LVIPWRD and LVIRSTD bits must be at 0 to enable the LVI module and to enable LVI resets.
12.3.3 Voltage Hysteresis Protection
Once the LVI has triggered (by having V
V
continually entering and exiting reset if V
V
120
TRIPF
DD
TRIPF
rises above the rising trip point voltage, V
. Setting the LVI enable in stop mode bit, LVISTOP, enables the LVI to operate in stop mode.
by the hysteresis voltage, V
DD
to remain above the V
DD
HYS
Chapter 17 System Integration Module (SIM)
DD
falls below the V
MC68HC908LB8 Data Sheet, Rev. 1
levels below the V
.
DD
DD
fall below V
is approximately equal to V
TRIPR
. This prevents a condition in which the MCU is
TRIPF
TRIPF
TRIPF
TRIPF
level. In the configuration register, the
DD
), the LVI will maintain a reset condition until
level, enabling LVI resets allows the LVI
level, software can monitor V
rises above a voltage, V
TRIPF
DD
. V
voltage. Clearing the LVI
TRIPR
DD
for the reset recovery
falls below a voltage,
Freescale Semiconductor
is greater than
TRIPR
DD
, which
by polling