MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 47

• Manufacturer Part Number: MC68HC908LB8CPE
• Description: IC MCU 8K FLASH 8MHZ 20DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908LB8CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVR, POR, PWM
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Monotonicity
the input signal. The ADC overrides the port I/O logic by forcing that pin as input to the ADC. The
remaining ADC channels/port pins are controlled by the port I/O logic and can be used as
general-purpose I/O. Writes to the port register or data direction register (DDR) will not have any effect
on the port pin that is selected by the ADC. Read of a port pin in use by the ADC will return a logic 0. If
the DDR bit is at 1, the value in the port data latch is read.
3.3.2 Voltage Conversion
When the input voltage to the ADC equals V
, the ADC converts the signal to $FF (full scale). If the
REFH
input voltage equals V
the ADC converts it to $00. Input voltages between V
and V
are a
,
REFL
REFH
REFL
straight-line linear conversion.
V
and V
are internally connected to V
and V
respectively.
REFH
REFL
DD
SS
3.3.3 Conversion Time
Conversion starts after a write to the ADC status and control register (ADSCR). One conversion will take
between 16 and 17 ADC clock cycles. The ADIVx bit should be set to provide a 1-MHz ADC clock
frequency.
16 to 17 ADC cycles
Conversion time =
ADC frequency
Number of bus cycles = conversion time × bus frequency
3.3.4 Conversion
In continuous conversion mode, the ADC data register will be filled with new data after each conversion.
Data from the previous conversion will be overwritten whether that data has been read or not.
Conversions will continue until the ADCO bit is cleared. The COCO bit is set after the first conversion and
will stay set until the next write of the ADC status and control register or the next read of the ADC data
register.
In single conversion mode, conversion begins with a write to the ADSCR. Only one conversion occurs
between writes to the ADSCR.
3.3.5 Accuracy and Precision
The conversion process is monotonic and has no missing codes.
3.4 Monotonicity
The conversion process is monotonic and has no missing codes.
3.5 Interrupts
When the AIEN bit is set, the ADC module is capable of generating CPU interrupts after each ADC
conversion. A CPU interrupt is generated if the COCO bit is at 0. The COCO bit is not used as a
conversion complete flag when interrupts are enabled.
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
47