HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 175

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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6.4.2
The interrupt control register 0 (ICR0) is a 16-bit register that sets the input signal detection mode
of the external interrupt input pin NMI and indicates the input signal level to the NMI pin. This
register is initialized to H'0000 at power-on reset or manual reset, but is not initialized in standby
mode.
Note:
Bit
15
14 to 9 —
8
7 to 0
* When NMI input is high: 1; when NMI input is low: 0.
Bit Name
NMIL
NMIE
Interrupt Control Register 0 (ICR0)
Initial Value
0/1 *
All 0
0
All 0
R
R/W
R/W
R
R
Description
NMI Input Level
Sets the level of the signal input at the NMI pin. This
bit can be read to determine the NMI pin level. This bit
cannot be modified.
0: NMI input level is low
1: NMI input level is high
Reserved
These bits are always read as 0. The write value
should always be 0.
NMI Edge Select
Selects whether the interrupt request signal is
detected on the falling or rising edge of NMI input.
0: Interrupt request signal is detected on falling edge
1: Interrupt request signal is detected on rising edge
Reserved
These bits are always read as 0. The write value
should always be 0.
of NMI input
of NMI input
Rev. 5.00 May 29, 2006 page 125 of 698
Section 6 Interrupt Controller (INTC)
REJ09B0146-0500

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