ATTINY167-15MZ Atmel, ATTINY167-15MZ Datasheet - Page 97
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ATTINY167-15MZ
Manufacturer Part Number
ATTINY167-15MZ
Description
MCU AVR 16K FLASH 15MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY167-15MD.pdf
(283 pages)
Specifications of ATTINY167-15MZ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY167-15MZ
Manufacturer:
ATMEL
Quantity:
670
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10.8
7728G–AVR–06/10
Timer/Counter Timing Diagrams
The following figures show the Timer/Counter in synchronous mode, and the timer clock
(clk
replaced by the Timer/Counter Oscillator clock. The figures include information on when inter-
rupt flags are set.
figure shows the count sequence close to the MAX value in all modes other than phase correct
PWM mode.
Figure 10-8. Timer/Counter Timing Diagram, no Prescaling
Figure 10-9
Figure 10-9. Timer/Counter Timing Diagram, with Prescaler (f
Figure 10-10
Figure 10-10. Timer/Counter Timing Diagram, Setting of OCF0A, with Prescaler (f
TCNTn
TCNTn
TCNTn
(clk
(clk
(clk
OCRnx
OCFnx
TOVn
TOVn
T
clk
clk
clk
clk
clk
clk
0) is therefore shown as a clock enable signal. In asynchronous mode, clk
I/O
I/O
I/O
I/O
Tn
I/O
Tn
I/O
Tn
/1)
/8)
/8)
shows the same timing data, but with the prescaler enabled.
shows the setting of OCF0A in all modes except CTC mode.
Figure 10-8
OCRnx - 1
MAX - 1
MAX - 1
contains timing data for basic Timer/Counter operation. The
OCRnx
MAX
MAX
OCRnx Value
ATtiny87/ATtiny167
OCRnx + 1
BOTTOM
BOTTOM
clk_I/O
/8)
BOTTOM + 1
BOTTOM + 1
OCRnx + 2
I/O
clk_I/O
should be
/8)
97
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