ATTINY167-15MZ Atmel, ATTINY167-15MZ Datasheet - Page 56

• Manufacturer Part Number: ATTINY167-15MZ
• Description: MCU AVR 16K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15MZ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.2
56
ATtiny87/ATtiny167
Clock monitoring
The following code example shows one assembly and one C function for changing the
time-out value of the Watchdog Timer.
Notes:
The Watchdog Timer can be used to detect a loss of system clock. This configuration is driven
by the dynamic clock switch circuit. Please refer to
34
Assembly Code Example
C Code Example
for more information.
WDT_Prescaler_Change:
void WDT_Prescaler_Change(void)
{
}
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
lds r16, WDTCR
ori
sts WDTCR, r16
; -- Got four cycles to set the new values from here -
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi
sts WDTCR, r16
; -- Finished setting new values, used 2 cycles -
; Turn on global interrupt
sei
ret
__disable_interrupt();
__watchdog_reset();
/* Start timed sequence */
WDTCR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCR
__enable_interrupt();
1.
2. The Watchdog Timer should be reset before any change of the WDP bits, since a change in
See ”About Code Examples” on page 6.
the WDP bits can result in a time-out when switching to a shorter time-out period.
r16, (1<<WDCE) | (1<<WDE)
r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)
= (1<<WDE) | (1<<WDP2) | (1<<WDP0);
(1)
(1)
Section 4.3.8 “Clock Monitoring” on page
7728G–AVR–06/10