ATMEGA165-16AI Atmel, ATMEGA165-16AI Datasheet - Page 85

• Manufacturer Part Number: ATMEGA165-16AI
• Description: IC AVR MCU 16K 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

8-bit Timer/Counter
Register Description
Timer/Counter Control
Register A – TCCR0A
2573G–AVR–07/09
Figure 37 shows the setting of OCF0A and the clearing of TCNT0 in CTC mode.
Figure 37. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with
Prescaler (f
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM00 bit specifies a non-PWM mode. How-
ever, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0 is written when operating in PWM mode. When writing a logical one to the
FOC0A bit, an immediate compare match is forced on the Waveform Generation unit.
The OC0A output is changed according to its COM0A1:0 bits setting. Note that the
FOC0A bit is implemented as a strobe. Therefore it is the value present in the
COM0A1:0 bits that determines the effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6, 3 – WGM01:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum
(TOP) counter value, and what type of waveform generation to be used. Modes of oper-
ation supported by the Timer/Counter unit are: Normal mode, Clear Timer on Compare
match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes. See Table
42 and “Modes of Operation” on page 80.
TCNTn
Bit
Read/Write
Initial Value
(clk
(CTC)
OCRnx
OCFnx
clk
clk
I/O
I/O
Tn
/8)
clk_I/O
FOC0A
W
7
0
/8)
TOP - 1
WGM00
R/W
6
0
COM0A1
R/W
5
0
COM0A0
R/W
TOP
4
0
WGM01
TOP
R/W
3
0
CS02
R/W
BOTTOM
2
0
ATmega165/V
CS01
R/W
1
0
CS00
R/W
BOTTOM + 1
0
0
TCCR0
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