ATMEGA165-16AI Atmel, ATMEGA165-16AI Datasheet - Page 195

IC AVR MCU 16K 16MHZ 64TQFP

ATMEGA165-16AI

Manufacturer Part Number
ATMEGA165-16AI
Description
IC AVR MCU 16K 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA165-16AI

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA165-16AI
Manufacturer:
Atmel
Quantity:
10 000
Changing Channel or
Reference Selection
ADC Input Channels
ADC Voltage Reference
2573G–AVR–07/09
The MUXn and REFS1:0 bits in the ADMUX Register are single buffered through a tem-
porary register to which the CPU has random access. This ensures that the channels
and reference selection only takes place at a safe point during the conversion. The
channel and reference selection is continuously updated until a conversion is started.
Once the conversion starts, the channel and reference selection is locked to ensure a
sufficient sampling time for the ADC. Continuous updating resumes in the last ADC
clock cycle before the conversion completes (ADIF in ADCSRA is set). Note that the
conversion starts on the following rising ADC clock edge after ADSC is written. The user
is thus advised not to write new channel or reference selection values to ADMUX until
one ADC clock cycle after ADSC is written.
If Auto Triggering is used, the exact time of the triggering event can be indeterministic.
Special care must be taken when updating the ADMUX Register, in order to control
which conversion will be affected by the new settings.
If both ADATE and ADEN is written to one, an interrupt event can occur at any time. If
the ADMUX Register is changed in this period, the user cannot tell if the next conversion
is based on the old or the new settings. ADMUX can be safely updated in the following
ways:
When updating ADMUX in one of these conditions, the new settings will affect the next
ADC conversion.
When changing channel selections, the user should observe the following guidelines to
ensure that the correct channel is selected:
In Single Conversion mode, always select the channel before starting the conversion.
The channel selection may be changed one ADC clock cycle after writing one to ADSC.
However, the simplest method is to wait for the conversion to complete before changing
the channel selection.
In Free Running mode, always select the channel before starting the first conversion.
The channel selection may be changed one ADC clock cycle after writing one to ADSC.
However, the simplest method is to wait for the first conversion to complete, and then
change the channel selection. Since the next conversion has already started automati-
cally, the next result will reflect the previous channel selection. Subsequent conversions
will reflect the new channel selection.
The reference voltage for the ADC (V
Single ended channels that exceed V
selected as either AVCC, internal 1.1V reference, or external AREF pin.
AVCC is connected to the ADC through a passive switch. The internal 1.1V reference is
generated from the internal bandgap reference (V
case, the external AREF pin is directly connected to the ADC, and the reference voltage
can be made more immune to noise by connecting a capacitor between the AREF pin
and ground. V
ter. Note that V
connected in a system.
If the user has a fixed voltage source connected to the AREF pin, the user may not use
the other reference voltage options in the application, as they will be shorted to the
external voltage. If no external voltage is applied to the AREF pin, the user may switch
1.When ADATE or ADEN is cleared.
2.During conversion, minimum one ADC clock cycle after the trigger event.
3.After a conversion, before the Interrupt Flag used as trigger source is cleared.
REF
REF
can also be measured at the AREF pin with a high impedant voltme-
is a high impedant source, and only a capacitive load should be
REF
REF
will result in codes close to 0x3FF. V
) indicates the conversion range for the ADC.
BG
) through an internal buffer. In either
ATmega165/V
REF
can be
195

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