ATMEGA165-16AI Atmel, ATMEGA165-16AI Datasheet - Page 176

• Manufacturer Part Number: ATMEGA165-16AI
• Description: IC AVR MCU 16K 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Functional Descriptions
Three-wire Mode
2573G–AVR–07/09
The Two-wire clock control unit can generate an interrupt when a start condition is
detected on the Two-wire bus. It can also generate wait states by holding the clock pin
low after a start condition is detected, or after the counter overflows.
The USI Three-wire mode is compliant to the Serial Peripheral Interface (SPI) mode 0
and 1, but does not have the slave select (SS) pin functionality. However, this feature
can be implemented in software if necessary. Pin names used by this mode are: DI, DO,
and USCK.
Figure 77. Three-wire Mode Operation, Simplified Diagram
Figure 77 shows two USI units operating in Three-wire mode, one as Master and one as
Slave. The two Shift Registers are interconnected in such way that after eight USCK
clocks, the data in each register are interchanged. The same clock also increments the
USI’s 4-bit counter. The Counter Overflow (interrupt) Flag, or USIOIF, can therefore be
used to determine when a transfer is completed. The clock is generated by the Master
device software by toggling the USCK pin via the PORT Register or by writing a one to
the USITC bit in USICR.
Figure 78. Three-wire Mode, Timing Diagram
CYCLE
USCK
USCK
SLAVE
MASTER
DO
DI
Bit7
Bit7
( Reference )
Bit6
Bit6
A
Bit5
Bit5
B
MSB
Bit4
Bit4
MSB
C
1
Bit3
Bit3
D
Bit2
Bit2
2
6
6
Bit1
Bit1
Bit0
Bit0
3
5
5
4
4
4
5
3
3
PORTxn
6
2
2
ATmega165/V
USCK
USCK
DO
DO
DI
DI
7
1
1
LSB
LSB
8
E
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