ATMEGA165-16AI Atmel, ATMEGA165-16AI Datasheet - Page 45

• Manufacturer Part Number: ATMEGA165-16AI
• Description: IC AVR MCU 16K 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Timed Sequences for Changing the Configuration of the Watchdog Timer
Safety Level 1
Safety Level 2
2573G–AVR–07/09
The following code example shows one assembly and one C function for turning off the
WDT. The example assumes that interrupts are controlled (e.g. by disabling interrupts
globally) so that no interrupts will occur during execution of these functions.
Note:
The sequence for changing configuration differs slightly between the two safety levels.
Separate procedures are described for each level.
In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the
WDE bit to 1 without any restriction. A timed sequence is needed when changing the
Watchdog Time-out period or disabling an enabled Watchdog Timer. To disable an
enabled Watchdog Timer, and/or changing the Watchdog Time-out, the following proce-
dure must be followed:
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be
2. Within the next four clock cycles, in the same operation, write the WDE and WDP
In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read
as one. A timed sequence is needed when changing the Watchdog Time-out period. To
change the Watchdog Time-out, the following procedure must be followed:
1. In the same operation, write a logical one to WDCE and WDE. Even though the
2. Within the next four clock cycles, in the same operation, write the WDP bits as
Assembly Code Example
C Code Example
written to WDE regardless of the previous value of the WDE bit.
bits as desired, but with the WDCE bit cleared.
WDE always is set, the WDE must be written to one to start the timed sequence.
desired, but with the WDCE bit cleared. The value written to the WDE bit is
irrelevant.
WDT_off:
void WDT_off(void)
{
}
; Reset WDT
wdr
; Write logical one to WDCE and WDE
in
ori
out
; Turn off WDT
ldi
out
ret
/* Reset WDT */
__watchdog_reset();
/* Write logical one to WDCE and WDE */
WDTCR |= (1<<WDCE) | (1<<WDE);
/* Turn off WDT */
WDTCR = 0x00;
1. See “About Code Examples” on page 6.
r16, WDTCR
r16, (1<<WDCE)|(1<<WDE)
WDTCR, r16
r16, (0<<WDE)
WDTCR, r16
(1)
(1)
ATmega165/V
45