PIC18C242/JW Microchip Technology, PIC18C242/JW Datasheet - Page 55

• Manufacturer Part Number: PIC18C242/JW
• Description: IC MCU EPROM 8KX16 A/D 28CDIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C242/JW

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: EPROM, UV
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-CDIP (0.300", 7.62mm) Window
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

4.13.1
The Reset Control (RCON) register contains flag bits
that allow differentiation between the sources of a
device RESET. These flags include the TO, PD, POR,
BOR and RI bits. This register is readable and writable.
REGISTER 4-3:
2001 Microchip Technology Inc.
RCON REGISTER
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON REGISTER
bit 7
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (16CXXX compatibility mode)
LWRT: Long Write Enable bit
1 = Enable TBLWT to internal program memory
0 = Disable TBLWT to internal program memory; TBLWT only to external program memory
Unimplemented: Read as '0'
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed
0 = The RESET instruction was executed causing a device RESET
TO: Watchdog Time-out Flag bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down Detection Flag bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = A Power-on Reset has not occurred
0 = A Power-on Reset occurred
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred
0 = A Brown-out Reset occurred
Legend:
R = Readable bit
- n = Value at POR reset
R/W-0
IPEN
Once this bit is set, it can only be cleared by a POR or MCLR Reset.
(must be set in software after a Brown-out Reset occurs)
(must be set in software after a Power-on Reset occurs)
(must be set in software after a Brown-out Reset occurs)
R/W-0
LWRT
U-0
W = Writable bit
’1’ = Bit is set
—
R/W-1
RI
Note 1: If the BOREN configuration bit is set
.
2: It is recommended that the POR bit be set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-1
(Brown-out Reset enabled), the BOR bit is
’1’ on a Power-on Reset. After a Brown-
out Reset has occurred, the BOR bit will
be clear and must be set by firmware to
indicate the occurrence of the next Brown-
out Reset.
If the BOREN configuration bit is clear
(Brown-out Reset disabled), BOR is
unknown after Power-on Reset and
Brown-out Reset conditions.
after a Power-on Reset has been
detected, so that subsequent Power-on
Resets may be detected.
TO
R/W-1
PD
PIC18CXX2
x = Bit is unknown
R/W-0
POR
DS39026C-page 53
R/W-0
BOR
bit 0