HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 32
HD6477021X20V
Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet
1.HD6417020SVX12IV.pdf
(511 pages)
Specifications of HD6477021X20V
Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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1.3.2
Table 1.3 describes the pin functions.
Table 1.3
Type
Power
Clock
System
control
Note: Pin 76 is RES in the SH7020, SH7021 (Masked ROM version) and Vpp in the SH7021
(PROM version).
Symbol
V
V
V
EXTAL
XTAL
CK
RES
WDTOVF
BREQ
BACK
Pin Functions
Pin Functions
CC
SS
PP
Pin No.
13, 38,
63, 73,
80, 88
4, 15, 24,
32, 41,
50, 59,
70, 81,
82, 92
76*
71
72
69
76
75
60
58
I/O
I
I
I
I
I
O
I
O
I
O
Name and Function
Power: Connected to the power supply. Connect all
V
operate if any V
Ground: Connected to ground. Connect all V
the system ground. The chip will not operate if any V
pin is left unconnected.
RES pin in the MCU mode. Apply +12.5V when
programming the PROM in the SH7021 (PROM
version).
Crystal/external clock: Connected to a crystal resonator
or external clock input having the same frequency as
the system clock (CK).
Crystal: Connected to a crystal resonator with the same
frequency as the system clock (CK). If an external clock
is input at the EXTAL pin, leave XTAL open.
System clock: Supplies the system clock (CK) to
peripheral devices.
Reset: Low input causes a power-on reset if NMI is
high, or a manual reset if NMI is low.
Watchdog timer overflow: Overflow output signal from
the watchdog timer.
Bus request: Driven low by an external device to
request the bus ownership.
Bus request acknowledge: Indicates that bus ownership
has been granted to an external device. By receiving
the BACK signal, a device that has sent a BREQ signal
can confirm that it has been granted the bus.
CC
pins to the system power supply . The chip will not
CC
pin is left unconnected.
RENESAS 9
SS
pins to
SS
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