HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 103

• Manufacturer Part Number: HD6477021X20V
• Description: MCU 5V 32K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6477021X20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

3. When receiving the user break interrupt request, the interrupt controller checks its priority
4. The INTC sends a request signal for a user break interrupt to the CPU. When the CPU receives
82 RENESAS
level. The user break interrupt has priority level 15, so it is accepted only if the interrupt mask
level in bits I3–I0 in the status register (SR) is 14 or lower. When the I3–I0 bit level is 15, the
user break interrupt cannot be accepted but it is held pending until user break interrupt
exception processing is carried out. NMI exception processing sets I3–I0 to level 15, so a user
break cannot occur during the NMI service routine unless the NMI service routine itself begins
by reducing I3–I0 to level 14 or lower. Section 5, Interrupt Controller, described the handling
of priority levels in greater detail.
it, it starts user break interrupt exception processing. Section 5.4, Interrupt Operation, describes
interrupt exception processing in more detail.