MCF5208CAB166 Freescale Semiconductor, MCF5208CAB166 Datasheet - Page 7

• Manufacturer Part Number: MCF5208CAB166
• Description: MCU 32BIT 166.67MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF520xr

Specifications of MCF5208CAB166

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 166.67MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 166.67MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.6/1.95/2.75/3.6V
• Operating Supply Voltage (min): 1.4/1.7/2.25/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Processor Series: MCF520x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

NOTES:
1
2
3
4
5
6
7
Signal Name
Refers to pin’s primary function.
Pull-up enabled internally on this signal for this mode.
The SDRAM functions of these signals are not programmable by the user. They are dynamically switched by the processor when
accessing SDRAM memory space and are included here for completeness.
Primary functionality selected by asserting the DRAMSEL signal (SDR mode). Alternate functionality selected by negating the
DRAMSEL signal (DDR mode). The GPIO module is not responsible for assigning these pins.
GPIO functionality is determined by the edge port module. The GPIO module is only responsible for assigning the alternate functions.
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO module is not responsible for assigning
these pins.
Pull-down enabled internally on this signal for this mode.
PLL_TEST
PLL_VDD
PLL_VSS
Freescale Semiconductor
SD_VDD
ALLPST
TEST
EVDD
IVDD
VSS
7
GPIO
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Table 3. MCF5207/8 Signal Information and Muxing (continued)
Alternate 1
MCF5208 ColdFire
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Alternate 2
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®
Power Supplies
Microprocessor Data Sheet, Rev. 3
Test
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O
I
I
EVDD
EVDD
EVDD
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1, 33, 63, 66,
3, 17, 35, 61,
2, 16, 36, 62,
89, 110, 123
72, 81, 87,
30, 68, 84,
65, 73, 88,
MCF5207
113, 143
111, 124
LQFP
144
109
125
67
86
85
—
D10, F6–F7,
G5, H5–H6,
D4, D8, H4,
E5–E6, F5,
E7–E8, F8,
MCF5207
MAPBGA
G8–G9,
H11, J9
G6–G7
H7–H8
H12
144
J3
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1, 10, 42, 68,
2, 9, 69, 72,
67, 97, 118,
80, 89, 95,
36, 74, 92,
11, 39, 41,
71, 81, 96,
MCF5208
117, 119,
121, 159
Signal Descriptions
QFP
160
131
129
130
73
94
93
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F6, G5, H10,
E8–E10, F9,
M2, N9, P1,
J7–J8, L13,
E5–E7, F5,
H5, J5, J6,
K5–K7, L2
MAPBGA
D11, H11,
F10, G10,
MCF5208
K8–K10,
A1, A14,
K13, M9
J12, D4,
J9, J10,
L4, L11,
G6–G9,
H6–H9,
F7–F8,
M13
C12
H13
P14
H12
196
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