MCF5208CAB166 Freescale Semiconductor, MCF5208CAB166 Datasheet - Page 37

• Manufacturer Part Number: MCF5208CAB166
• Description: MCU 32BIT 166.67MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF520xr

Specifications of MCF5208CAB166

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 166.67MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 166.67MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.6/1.95/2.75/3.6V
• Operating Supply Voltage (min): 1.4/1.7/2.25/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Processor Series: MCF520x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

5.12.2 MII Transmit Signal Timing (FEC_TXD[3:0], FEC_TXEN,
Table 19
The transmitter functions correctly up to a FEC_TXCLK maximum frequency of 25 MHz +1%. In
addition, the processor clock frequency must exceed twice the FEC_TXCLK frequency.
Figure 24
5.12.3 MII Async Inputs Signal Timing (FEC_CRS and FEC_COL)
Table 20
Figure 25
Freescale Semiconductor
Num
Num
M5
M6
M7
M8
M9
FEC_TXD[3:0] (outputs)
lists MII transmit channel timings.
lists MII asynchronous inputs signal timing.
shows MII transmit signal timings listed in
shows MII asynchronous input timings listed in
FEC_TXER, FEC_TXCLK)
FEC_TXCLK (input)
FEC_TXCLK to FEC_TXD[3:0], FEC_TXEN, FEC_TXER
invalid
FEC_TXCLK to FEC_TXD[3:0], FEC_TXEN, FEC_TXER valid
FEC_TXCLK pulse width high
FEC_TXCLK pulse width low
FEC_CRS, FEC_COL minimum pulse width
FEC_TXEN
FEC_TXER
FEC_CRS
FEC_COL
MCF5208 ColdFire
Figure 24. MII Transmit Signal Timing Diagram
Figure 25. MII Async Inputs Timing Diagram
Characteristic
Characteristic
Table 20. MII Async Inputs Signal Timing
Table 19. MII Transmit Signal Timing
®
Microprocessor Data Sheet, Rev. 3
M5
M6
M7
Table
M9
Table
19.
20.
35%
35%
Min
Min
1.5
—
M8
5
Max
65%
65%
Max
25
—
—
Electrical Characteristics
FEC_TXCLK period
FEC_TXCLK period
FEC_TXCLK period
Unit
Unit
ns
ns
37