MCF5208CAB166 Freescale Semiconductor, MCF5208CAB166 Datasheet - Page 26
![MCU 32BIT 166.67MHZ 160-QFP](/photos/31/38/313814/160pin_pqfp_sml.jpg)
MCF5208CAB166
Manufacturer Part Number
MCF5208CAB166
Description
MCU 32BIT 166.67MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF520xr
Datasheet
1.MCF5207CVM166J.pdf
(46 pages)
Specifications of MCF5208CAB166
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
166.67MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
166.67MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.6/1.95/2.75/3.6V
Operating Supply Voltage (min)
1.4/1.7/2.25/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Processor Series
MCF520x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5208CAB166
Manufacturer:
SANREX
Quantity:
210
Company:
Part Number:
MCF5208CAB166
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical Characteristics
5.7.1
FlexBus is a multi-function external bus interface provided to interface to slave-only devices up to a
maximum bus frequency of 83.33 MHz. It can be directly connected to asynchronous or synchronous
devices such as external boot ROMs, flash memories, gate-array logic, or other simple target (slave)
devices with little or no additional circuitry. For asynchronous devices, a simple chip-select based interface
can be used. The FlexBus interface has six general purpose chip-selects (FB_CS[5:0]) that can be
configured to be distributed between the FlexBus or SDRAM memory interfaces. Chip-select FB_CS[0]
can be dedicated to boot ROM access and can be programmed to be byte (8 bits), word (16 bits), or
longword (32 bits) wide. Control signal timing is compatible with common ROM/flash memories.
26
* The timings are also valid for inputs sampled on the negative clock edge.
FB_CLK
Inputs
FlexBus
All other timing relationships can be derived from these values. Timings
listed in
Input Setup And Hold
FB_CLK(75MHz)
Table 11
Input Rise Time
FB4
Input Fall Time
MCF5208 ColdFire
Figure 13. General Input Timing Requirements
are shown in
Invalid
®
Figure 14
Microprocessor Data Sheet, Rev. 3
V
V
V
h
h
V
l
= V
l
= V
= V
= V
IH
IH
IL
IL
T
1.5V Valid
SETUP
and
1.5V
T
HOLD
Figure
1.5V
t
t
rise
fall
FB5
15.
Invalid
Freescale Semiconductor