MCF5208CAB166 Freescale Semiconductor, MCF5208CAB166 Datasheet - Page 36

• Manufacturer Part Number: MCF5208CAB166
• Description: MCU 32BIT 166.67MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF520xr

Specifications of MCF5208CAB166

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 166.67MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 166.67MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.6/1.95/2.75/3.6V
• Operating Supply Voltage (min): 1.4/1.7/2.25/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Processor Series: MCF520x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Electrical Characteristics
5.12 Fast Ethernet AC Timing Specifications
MII signals use TTL signal levels compatible with devices operating at 5.0 V or 3.3 V.
5.12.1 MII Receive Signal Timing (FEC_RXD[3:0], FEC_RXDV,
The receiver functions correctly up to a FEC_RXCLK maximum frequency of 25 MHz +1%. There is no
minimum frequency requirement. In addition, the processor clock frequency must exceed twice the
FEC_RXCLK frequency.
Table 18
Figure 23
36
I2C_SDA
I2C_SCL
FEC_RXD[3:0] (inputs)
Num
M1
M2
M3
M4
lists MII receive channel timings.
FEC_RXCLK (input)
shows MII receive signal timings listed in
FEC_RXER, and FEC_RXCLK)
FEC_RXD[3:0], FEC_RXDV, FEC_RXER to FEC_RXCLK
setup
FEC_RXCLK to FEC_RXD[3:0], FEC_RXDV, FEC_RXER hold
FEC_RXCLK pulse width high
FEC_RXCLK pulse width low
FEC_RXER
FEC_RXDV
I1
MCF5208 ColdFire
I2
Figure 23. MII Receive Signal Timing Diagram
Characteristic
Figure 22. I
Table 18. MII Receive Signal Timing
I4
M1
®
2
Microprocessor Data Sheet, Rev. 3
M2
I6
C Input/Output Timings
M3
Table
I7
18.
M4
I8
35%
35%
Min
5
5
Max
65%
65%
—
—
I5
I3
FEC_RXCLK period
FEC_RXCLK period
Freescale Semiconductor
Unit
ns
ns
I9