R5F212A8SNFA#U0 Renesas Electronics America, R5F212A8SNFA#U0 Datasheet - Page 531

• Manufacturer Part Number: R5F212A8SNFA#U0
• Description: IC R8C/2A MCU FLASH 64K 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Ar

Specifications of R5F212A8SNFA#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
20.4.4
Table 20.5
D0 to D7:Indicate the data bus which is read when the read status register command is executed.
Bits FMR07 (SR5) to FMR06 (SR4) are set to 0 by executing the clear status register command.
When the FMR07 bit (SR5) or FMR06 bit (SR4) is set to 1, the program and block erase commands cannot
be accepted.
SR0 (D0)
SR1 (D1)
SR2 (D2)
SR3 (D3)
SR4 (D4)
SR5 (D5)
SR6 (D6)
SR7 (D7)
20.4.4.1
20.4.4.2
20.4.4.3
Status Register
The status register indicates the operating status of the flash memory and whether an erase or program operation
has completed normally or in error. Status of the status register can be read by bits FMR00, FMR06, and
FMR07 in the FMR0 register.
Table 20.5 lists the Status Register Bits.
In EW0 mode, the status register can be read in the following cases:
The sequencer status bits indicate the operating status of the flash memory. SR7 is set to 0 (busy) during auto-
programming and auto-erasure, and is set to 1 (ready) at the same time the operation completes.
Refer to 20.4.5 Full Status Check.
Refer to 20.4.5 Full Status Check.
•
•
Nov 26, 2007
Bit
When a given address in the user ROM area is read after writing the read status register command
When a given address in the user ROM area is read after executing program or block erase command but
before executing the read array command.
Status Registers
Program Status (Bits SR4 and FMR06)
Sequencer Status (Bits SR7 and FMR00)
Erase Status (Bits SR5 and FMR07)
Status Register Bits
−
−
−
−
FMR06
FMR07
−
FMR00
FMR0 Register
Page 509 of 580
Bit
Reserved
Reserved
Reserved
Reserved
Program status Completed
Erase status
Reserved
Sequencer
status
Status Name
−
−
−
−
normally
Completed
normally
−
Busy
0
Description
−
−
−
−
Error
Error
−
Ready
1
−
−
−
−
0
0
−
1
20. Flash Memory
Value After
Reset