R5F212A8SNFA#U0 Renesas Electronics America, R5F212A8SNFA#U0 Datasheet - Page 479

• Manufacturer Part Number: R5F212A8SNFA#U0
• Description: IC R8C/2A MCU FLASH 64K 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Ar

Specifications of R5F212A8SNFA#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
17. Hardware LIN
The hardware LIN performs LIN communication in cooperation with timer RA and UART0.
17.1
Figure 17.1
RXD0 pin
TXD0 pin
The hardware LIN has the features listed below.
Figure 17.1 shows a Block Diagram of Hardware LIN.
Master mode
Slave mode
•
•
•
•
•
•
Generates Synch Break
Detects bus collision
Detects Synch Break
Measures Synch Field
Controls Synch Break and Synch Field signal inputs to UART0
Detects bus collision
NOTE:
Features
Nov 26, 2007
LINE, MST, SBE, LSTART, BCIE, SBIE, SFIE: Bits in LINCR register
TIOSEL: Bit in TRAIOC register
TE: Bit in U0C1 register
1.The WakeUp function is detected by INT1.
LSTART bit
Hardware LIN
Block Diagram of Hardware LIN
LINE bit
SBE bit
Page 457 of 580
RXD0 input
control
circuit
Synch Field
control
circuit
TIOSEL = 0
TIOSEL = 1
Bus collision
detection
circuit
MST bit
and SFIE bits
BCIE, SBIE,
RXD data
Interrupt
control
circuit
Timer RA output pulse
UART0 transfer clock
UART0 TXD data
UART0 TE bit
underflow signal
Timer RA
Timer RA
UART0
17. Hardware LIN
Timer RA
interrupt