R5F212A8SNFA#U0 Renesas Electronics America, R5F212A8SNFA#U0 Datasheet - Page 257

• Manufacturer Part Number: R5F212A8SNFA#U0
• Description: IC R8C/2A MCU FLASH 64K 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Ar

Specifications of R5F212A8SNFA#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
Figure 14.61
14.3.8
Table 14.25
Timer RC Status Register
Timer RC generates a timer RC interrupt request from five sources. The timer RC interrupt uses the single
TRCIC register (bits IR and ILVL0 to ILVL2) and a single vector.
Table 14.25 lists the Registers Associated with Timer RC Interrupt, and Figure 14.61 is a Timer RC Interrupt
Block Diagram.
Like other maskable interrupts, the timer RC interrupt is controlled by the combination of the I flag, IR bit, bits
ILVL0 to ILVL2, and IPL. However, it differs from other maskable interrupts in the following respects because
a single interrupt source (timer RC interrupt) is generated from multiple interrupt request sources.
Refer to Figure 14.30 TRCIER Register, for details of the TRCIER register.
Refer to 12.1.6 Interrupt Control, for details of the TRCIC register and 12.1.5.2 Relocatable Vector Tables,
for information on interrupt vectors.
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Nov 26, 2007
The IR bit in the TRCIC register is set to 1 (interrupt requested) when a bit in the TRCSR register is set to
1 and the corresponding bit in the TRCIER register is also set to 1 (interrupt enabled).
The IR bit is set to 0 (no interrupt request) when the bit in the TRCSR register or the corresponding bit in
the TRCIER register is set to 0, or both are set to 0. In other words, the interrupt request is not maintained
if the IR bit is once set to 1 but the interrupt is not acknowledged.
If after the IR bit is set to 1 another interrupt source is triggered, the IR bit remains set to 1 and does not
change.
If multiple bits in the TRCIER register are set to 1, use the TRCSR register to determine the source of the
interrupt request.
The bits in the TRCSR register are not automatically set to 0 when an interrupt is acknowledged. Set them
to 0 within the interrupt routine. Refer to Figure 14.31 TRCSR Register, for the procedure for setting
these bits to 0.
TRCSR
Timer RC Interrupt
Timer RC Interrupt Block Diagram
Registers Associated with Timer RC Interrupt
IMFA, IMFB, IMFC, IMFD, OVF: Bits in TRCSR register
IMIEA, IMIEB, IMIEC, IMIED, OVIE: Bits in TRCIER register
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IMIEA bit
IMIEB bit
IMIEC bit
IMIED bit
IMFA bit
IMFB bit
IMFC bit
IMFD bit
OVIE bit
OVF bit
Timer RC Interrupt Enable Register
TRCIER
Timer RC Interrupt Control Register
Timer RC interrupt request
(IR bit in TRCIC register)
TRCIC
14. Timers