R5F212A8SNFA#U0 Renesas Electronics America, R5F212A8SNFA#U0 Datasheet - Page 270

• Manufacturer Part Number: R5F212A8SNFA#U0
• Description: IC R8C/2A MCU FLASH 64K 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Ar

Specifications of R5F212A8SNFA#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
Figure 14.68
14.4.5
i = 0 or 1
NOTE 1: When the BFCi bit in the TRDMR register is set to 1 (the TRDGRCi register is used as the buffer register of the
NOTE 2: When the BFDi bit in the TRDMR register is set to 1 (the TRDGRDi register is used as the buffer register of the
TRDIOAi
TRDIOCi
TRDIODi
TRDIOBi
The input capture function measures the external signal width and period. The content of the TRDi register
(counter) is transferred to the TRDGRji register as a trigger of the TRDIOji (i = 0 or 1, j = either A, B, C, or D)
pin external signal (input capture). Since this function is enabled with a combination of the TRDIOji pin and
TRDGRji register, the input capture function, or any other mode or function, can be selected for each individual
pin.
The TRDGRA0 register can also select fOCO128 signal as input-capture trigger input.
Figure 14.68 shows a Block Diagram of Input Capture Function, Table 14.38 lists the Input Capture Function
Specifications. Figures 14.69 to 14.80 show the Registers Associated with Input Capture Function, and Figure
14.81 shows an Operating Example of Input Capture Function.
TRDGRAi register).
TRDGRBi register).
Nov 26, 2007
(3)
Input Capture Function
Block Diagram of Input Capture Function
(Note 1)
(Note 2)
Page 248 of 580
Input capture signal
Input capture signal
Input capture signal
Input capture signal
TRDGRCi
TRDGRDi
TRDGRAi
TRDGRBi
register
register
register
register
TRDi register
TRDIOA0
NOTE 3: The trigger input of the TRDGRA0 register
fOCO
can select the TRDIOA0 pin input or
fOCO128 signal.
Divided
by 128
fOCO128
IOA3 = 0
IOA3 = 1
Input capture
signal
14. Timers