MC56F8011VFAE Freescale Semiconductor, MC56F8011VFAE Datasheet - Page 43

• Manufacturer Part Number: MC56F8011VFAE
• Description: IC DIGITAL SIGNAL CTLR 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8011VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 12KB (6K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 26
• Data Ram Size: 2 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
• Interface Type: SCI, SPI, I2C
• Minimum Operating Temperature: - 40 C
• For Use With: CPA56F8013 - BOARD SOCKET FOR MC56F8013APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
FM_CLKDIV
FM_CNFG
FM_SECHI
FM_SECLO
FM_PROT
FM_USTAT
SIM_CTRL
SIM_RSTAT
SIM_SWC0
SIM_SWC1
SIM_SWC2
SIM_SWC3
SIM_MSHID
SIM_LSHID
SIM_PWR
SIM_CLKOUT
SIM_GPS
SIM_PCE
SIM_IOSAHI
SIM_IOSALO
PS_CTRL
PS_STAT
Register Acronym
Register Acronym
Register Acronym
Table 4-22 System Integration Module Registers Address Map
Table 4-23 Power Supervisor Registers Address Map
Table 4-24 Flash Module Registers Address Map
Address Offset
Address Offset
Address Offset
$11 - $12
$5 - $9
56F8013/56F8011 Data Sheet, Rev. 12
$10
$13
$0
$1
$2
$3
$4
$C
$D
$A
$B
$E
$0
$1
$0
$1
$2
$3
$4
$5
$6
$7
$8
(SIM_BASE = $00 F140)
(FM_BASE = $00 F400)
(PS_BASE = $00 F160)
Clock Divider Register
Configuration Register
Reserved
Security High Half Register
Security Low Half Register
Reserved
Protection Register
Reserved
User Status Register
Control Register
Reset Status Register
Software Control Register 0
Software Control Register 1
Software Control Register 2
Software Control Register 3
Most Significant Half JTAG ID
Least Significant Half JTAG ID
Power Control Register
Reserved
Clock Out Select Register
GPIO Peripheral Select Register
Peripheral Clock Enable Register
I/O Short Address Location High Register
I/O Short Address Location Low Register
Control Register
Status Register
Register Description
Register Description
Register Description
Peripheral Memory Mapped Registers
43