ST72F521AR9TC STMicroelectronics, ST72F521AR9TC Datasheet - Page 64

IC MCU 8BIT 60K FLASH 64-TQFP

ST72F521AR9TC

Manufacturer Part Number
ST72F521AR9TC
Description
IC MCU 8BIT 60K FLASH 64-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F521AR9TC

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP, 64-VQFP
For Use With
497-6453 - BOARD EVAL BASED ON ST7LNBX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72F521AR9TC
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST72F521AR9TC
Manufacturer:
ST
0
Part Number:
ST72F521AR9TCE
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST72F521AR9TCE
Manufacturer:
ST
0
Part Number:
ST72F521AR9TCTR
Manufacturer:
STMicroelectronics
Quantity:
10 000
ST72F521, ST72521B
PWM AUTO-RELOAD TIMER (Cont’d)
Output compare and Time base interrupt
On overflow, the OVF flag of the ARTCSR register
is set and an overflow interrupt request is generat-
ed if the overflow interrupt enable bit, OIE, in the
ARTCSR register, is set. The OVF flag must be re-
set by the user software. This interrupt can be
used as a time base in the application.
Figure 40. External Event Detector Example (3 counts)
64/215
f
EXT
COUNTER
=f
COUNTER
OVF
FDh
FEh
ARTARR=FDh
FFh
INTERRUPT
IF OIE=1
FDh
External clock and event detector mode
Using the f
auto-reload timer can be used as an external clock
event detector. In this mode, the ARTARR register
is used to select the n
be counted before setting the OVF flag.
Caution: The external clock function is not availa-
ble in HALT mode. If HALT mode is used in the ap-
plication, prior to executing the HALT instruction,
the counter must be disabled by clearing the TCE
bit in the ARTCSR register to avoid spurious coun-
ter increments.
ARTCSR READ
FEh
EXT
n
EVENT
external prescaler input clock, the
FFh
INTERRUPT
IF OIE=1
= 256 - ARTARR
EVENT
FDh
number of events to
ARTCSR READ
t

Related parts for ST72F521AR9TC