ST72F521AR9TC STMicroelectronics, ST72F521AR9TC Datasheet - Page 148

• Manufacturer Part Number: ST72F521AR9TC
• Description: IC MCU 8BIT 60K FLASH 64-TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F521AR9TC

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: 497-6453 - BOARD EVAL BASED ON ST7LNBX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST72F521, ST72521B
CONTROLLER AREA NETWORK (Cont’d)
Software Work-around - Devices with Hard-
ware Fix (ST72F521 rev “R”):
To implement a transmission abort under safe
conditions, the LOCK bit must not be reset during
the critical window (2 bit times). A new function
has been implemented in the MCU allowing the
application to synchronize the reset of the LOCK
bit (abort request) with the reset of the TXRQST bit
(internal signal) in the pCAN core.
The synchronization is done using the WKPS bit in
the CANCSR register, the function of this bit has
been modified and no more Wake-up Pulse (dom-
inant bit) is sent on the CAN_TX signal when the
WKPS bit is set. This means the functionality de-
scribed in the datasheet is no longer applicable
(see
148/215
CANCSR |= WKPS;
while(!(CANCSR & WKPS) );// Wait until WKPS bit is set
while( CANBCSR & LOCK )// Wait until abort has been confirmed
{
}
CANCSR &= ~WKPS;
CANBCSR |= LOCK;
Section
10.8.5.4).
CANBCSR &= ~LOCK;
// Set WKPS bit
// Allow transmission again
//Alloc buffer for next transmission
To abort the transmission, first the application sets
the WKPS bit and polls it until it is set. The maxi-
mum time needed to set this bit is two CAN bit
times. Once the application has read the WKPS bit
as one, it can reset the LOCK bit to stop the cur-
rent transmission.
The abort is completed when the LOCK bit is read
back as zero by the application. Once the abort
has been completed, the application must reset
the WKPS bit to be able to transmit again. Of
course the transmit buffer must be in LOCK state
as usual before any transmission attempt.
The “C” code sequence below shows the software
work-around using the WKPS bit.