ST72F521AR9TC STMicroelectronics, ST72F521AR9TC Datasheet - Page 196

• Manufacturer Part Number: ST72F521AR9TC
• Description: IC MCU 8BIT 60K FLASH 64-TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F521AR9TC

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: 497-6453 - BOARD EVAL BASED ON ST7LNBX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST72F521, ST72521B
10-BIT ADC CHARACTERISTICS (Cont’d)
12.12.3 ADC Accuracy
Conditions: V
Notes:
1. ADC Accuracy vs. Negative Injection Current: Injecting negative current may reduce the accuracy of the conversion
being performed on another analog input. The effect of negative injection current on robust pins is specified in
12.12.
Any positive injection current within the limits specified for I
accuracy.
2. Data based on characterization results, monitored in production to guarantee 99.73% within ± max value from -40°C
to 125°C (± 3σ distribution limits).
Figure 114. ADC Accuracy Characteristics
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Symbol
1023
1022
1021
|E
|E
|E
|E
|E
7
6
5
4
3
2
1
O
G
D
T
L
0
V
|
|
|
|
|
SSA
Digital Result ADCDR
1LSB
Total unadjusted error
Offset error
Gain Error
Differential linearity error
Integral linearity error
1
E
O
IDEAL
DD
2
=5V
1)
Parameter
3
=
1)
V
--------------------------------------------
1)
AREF
4
1024
5
–
1 LSB
1)
V
1)
SSA
E
1)
6
T
IDEAL
E
7
L
(2)
CPU in run mode @ f
CPU in run mode @ f
E
D
1021 1022 1023 1024
(3)
INJ(PIN)
(1)
Conditions
E
G
V
AREF
and ΣI
ADC
ADC
2 MHz.
2 MHz.
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
INJ(PIN)
T
O
G
D
L
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
=Differential Linearity Error: maximum deviation
V
in
(LSB
in
Section 12.8
IDEAL
Typ
)
0.5
3
2
1
1
does not affect the ADC
Max
4
3
3
2
2
2)
Unit
LSB
Section