ST7FDALIF2M6TR STMicroelectronics, ST7FDALIF2M6TR Datasheet - Page 92

• Manufacturer Part Number: ST7FDALIF2M6TR
• Description: IC MCU 8BIT 8K FLASH 20-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FDALIF2M6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: DALI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: ST7DALI
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: DALI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7DALI-EVAL, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel / 13 bit, 7 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DALI communication module
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General description
The DCM is able to receive or transmit a serial DALI signal using a 16-bit shift register, an
edge detector, several data/control registers and arbitration logic.
The DCM receives the DALI standard signal from the lighting control network, checks for
errors and loads the address/data bytes of a "forward frame" to the corresponding
DCMFA/DCMFD registers and sends back the data byte of the "backward frame" (written by
software to the DCMBD register) in DALI standard format.
The data rate can be changed by writing in the DCMCLK register (f
The DALI standard data rate f
Following the above formula, if f
"207". The bi-phase bit period is 833.33 us ±10%.
The polarity of the bi-phase start bit is not configurable. The start bit is a logical ’1’.
The polarity of the 2 stop bits is not configurable. The 2 stop bits are set to high level.
If an error is detected during reception, the frame will be ignored and the DCM will return to
Receive state.
Functional description
The user must write to the DCMCLK register to select the data rate according to the DALI
signal frequency.
After Reset, the DCM is in Receive state and waits for the bi-phase start bit (logical ’1’) of
the "forward frame".
The DCM checks the data format of the "forward frame" with the 4-bit pre-shift register. If an
error occurs during reception, the DCM will skip the data and return to the Receive state.
If there is no error in the "forward frame", the data will be shifted Most Significant Bit-first into
the 16-bit shift register. The address byte and the data byte will be loaded to the
corresponding DCMFA and DCMFD registers. The DCM will send an interrupt signal by
setting the ITF bit in the DCMCSR register.
If the software receives an interrupt signal from the DCM, it reads the DCMFA and DCMFD
registers.
Depending on the command, the DCM is able to send back or receive data.
In an interrupt routine, the RTS bit has to be set either before or at the same time as the RTA
bit.
If the software asks the DCM to send back a "backward frame", the software must first write
to the DCMBD register and switch the DCM to Transmit state by setting the RTS and RTA
bits in the DCMCR register during the interrupt routine. The DCMBD register will be shifted
out from the 16-bit shift register in DALI format, the Most Significant Bit-first.
When the "backward frame" has been transmitted, the DCM will send an interrupt signal by
setting the ITF bit in the DCMCSR register.
f
DATA
= f
CPU
/[(N+1)*16]
DALI
CPU
is 1.2 kHz. N is the integer value of the DCMCLK register.
is 8 MHz, the integer value of the DCMCLK register is
DATA
= 2* f
DALI
ST7DALIF2
).