ST7FDALIF2M6TR STMicroelectronics, ST7FDALIF2M6TR Datasheet - Page 87

• Manufacturer Part Number: ST7FDALIF2M6TR
• Description: IC MCU 8BIT 8K FLASH 20-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FDALIF2M6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: DALI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: ST7DALI
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: DALI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7DALI-EVAL, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel / 13 bit, 7 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7DALIF2
15.6.2
15.6.3
15.6.4
Note:
Bit 0 = TB2F Timebase 2 Interrupt Flag.
This bit is set by hardware and cleared by software reading the LTCSR register. Writing to
this bit has no effect.
0: No Counter 2 overflow
1: A Counter 2 overflow has occurred
Lite timer autoreload register (LTARR)
Read / Write
Reset Value: 0000 0000 (00h)
Bits 7:0 = AR[7:0] Counter 2 Reload Value.
These bits register is read/write by software. The LTARR value is automatically loaded into
Counter 2 (LTCNTR) when an overflow occurs.
Lite timer counter 2 (LTCNTR)
Read only
Reset Value: 0000 0000 (00h)
Bits 7:0 = CNT[7:0] Counter 2 Reload Value.
This register is read by software. The LTARR value is automatically loaded into Counter 2
(LTCNTR) when an overflow occurs.
Lite timer control/status register (LTCSR1)
Read / Write
Reset Value: 0x00 0000 (x0h)
Bit 7 = ICIE Interrupt Enable.
This bit is set and cleared by software.
0: Input Capture (IC) interrupt disabled
1: Input Capture (IC) interrupt enabled
Bit 6 = ICF Input Capture Flag.
This bit is set by hardware and cleared by software by reading the LTICR register. Writing to
this bit does not change the bit value.
0: No input capture
1: An input capture has occurred
After an MCU reset, software must initialise the ICF bit by reading the LTICR register
CNT7
AR7
ICIE
7
7
7
CNT7
AR7
ICF
CNT7
AR7
TB
TB1IE
CNT7
AR7
CNT3
TB1F
AR3
CNT2
AR2
-
CNT1
AR1
Lite timer 2 (LT2)
-
CNT0
AR0
0
0
0
87/171
-