EP9312-IB Cirrus Logic Inc, EP9312-IB Datasheet - Page 655

IC ARM920T MCU 200MHZ 352-PBGA

EP9312-IB

Manufacturer Part Number
EP9312-IB
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-IB

Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
352-BGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1259

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RTCSWComp
DS785UM1
31
15
Address:
Default:
Mask:
Definition:
Bit Descriptions:
30
14
29
13
28
12
0x8092_0108 - Read/Write
0x0000_7FFF
003F_FFFF
RTC Software Compensation Register.
RSVD:
0:
DEL:
INT:
27
11
RSVD
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
Must be written as “0”.
Number of clocks to delete. This value determines the
number of 32.768 KHZ clocks to delete every 32 seconds
for compensating the oscillator. The value defaults to 0x0
which deletes no clock pulses.
Counter pre-load Integer value. This value is pre-loaded
into the counter as the integer divide portion of the
oscillator compensation. If set to 0x0000, no integer divide
occurs and no clock pulses are deleted. The value defaults
to 0x7FFF which causes the divider to divide by exactly
32,768 to generate a 1 Hz clock.
24
8
INT
23
7
22
6
21
0
5
Real Time Clock With Software Trim
20
4
19
3
EP93xx User’s Guide
DEL
18
2
17
1
16
20-7
0
20

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