LPC3180FEL320/01,5 NXP Semiconductors, LPC3180FEL320/01,5 Datasheet - Page 41

• Manufacturer Part Number: LPC3180FEL320/01,5
• Description: IC ARM9 MCU 208MHZ 320-LFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC3000r

Specifications of LPC3180FEL320/01,5

• Package / Case: 320-LFBGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 208MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, UART/USART, USB OTG
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 55
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.3 V
• Data Converters: A/D 3x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC31
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 208 MHz
• Operating Supply Voltage: 1.8 V / 3V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM10096
• Minimum Operating Temperature: - 40 C
• Package: 320LFBGA
• Device Core: ARM926EJ-S
• Family Name: LPC3100
• Maximum Speed: 208 MHz
• Number Of Programmable I/os: 55
• Interface Type: I2C/SPI/UART/USB
• On-chip Adc: 3-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1018 - EVAL KIT FOR LP3180568-4063 - KIT DEV LPC3180568-4062 - DEBUGGER J-LINK JTAG568-4061 - DEBUGGER U-LINK2 JTAG FOR NXP
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4529; 935286983551

NXP Semiconductors
Table 13.
LPC3180_01_1
Preliminary data sheet
Fig 13. MLC NAND flash controller read timing
Symbol Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ALS
ALH
AR
CEA
CS
CH
CLS
CLH
CLR
DH
DS
IR
RC
REA
REH
RHOH
RHZ
RP
RR
WB
WC
WH
(from NAND Flash
perspective)
ALE setup time
ALE hold time
ALE to RE# delay
CE# access time
CE# setup time
CE# hold time
CLE setup time
CLE hold time
CLE to RE# delay
Data hold time
(output from MCU)
Data setup time
(output from MCU)
Output hi-Z to RE# low
RE# cycle time
RE# access time
RE# high time
RE# high to output hold
(input hold for MCU)
RE# high to output hi-Z
RE# pulse width
Ready to RE# low
WE# high to R/B# low
WE# cycle time
WE# high time
Dynamic characteristics of SLC NAND Flash Memory pins
FLASH_IO[0-7]
CE
RE
[1][2][4][6]
[1][7]
[1][2][6]
[1][2][4][6][8]
[1][2][4][6][8]
[1][3]
[1][2][4][6][8]
[1][3]
[1][2][6]
[1][3][7]
[1][2][4][6][8]
[1][2][6]
[1][2]
[1][4]
[1][2][3]
[1]
[1][4]
[1][2][3]
[1][8]
[1][6][7][8]
[1][6][7]
Rev. 00.08 — 20 November 2008
t
d(CERE)
16/32-bit ARM microcontroller with external memory interface
D0
Typical
Reads
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
0
(T
(T
(T
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
x (Rsu + Rw))
x (Rh))
x (Rsu))
x (Rsu + Rw))
x (Rsu + Rw))
x (Rh))
x (Rsu + Rw))
x (Rh))
x (Rsu))
x (Rh))
x (Rsu + Rw))
x (Rsu))
x (Rsu + Rw + Rh))
x (Rw))
x (Rsu + Rh))
x (Rh))
x (Rw))
x (Rsu))
D1
t
RP
D2
t
RC
t
REH
D3
Typical
Writes
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
(T
0
(T
(T
(T
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
t
RHZ
x (Wsu + Ww))
x (Wh))
x (Wsu))
x (Wsu + Ww))
x (Wsu + Ww))
x (Wh))
x (Wsu + Ww))
x (Wh))
x (Wsu))
x (Wh))
x (Wsu + Ww))
x (Wsu))
x (Ww))
x (Wsu + Ww + Wh)) ns
x (Wsu + Wh))
LPC3180/01
© NXP B.V. 2008. All rights reserved.
41 of 56
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns