ATSAM3S4CA-CU Atmel, ATSAM3S4CA-CU Datasheet - Page 595

IC MCU 32BIT 256KB FLASH 100BGA

ATSAM3S4CA-CU

Manufacturer Part Number
ATSAM3S4CA-CU
Description
IC MCU 32BIT 256KB FLASH 100BGA
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S4CA-CU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
79
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 16x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Package
100LFBGA
Device Core
ARM Cortex M3
Family Name
AT91
Maximum Speed
64 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
79
Interface Type
I2C/I2S/SPI/UART/USART/USB
On-chip Adc
16-chx12-bit
On-chip Dac
2-chx12-bit
Number Of Timers
6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Figure 30-11. Peripheral Deselection
30.7.3.10
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
Write SPI_TDR
Write SPI_TDR
Write SPI_TDR
Write SPI_TDR
NPCS[0..3]
NPCS[0..3]
NPCS[0..3]
NPCS[0..3]
TDRE
TDRE
TDRE
TDRE
Mode Fault Detection
PCS = A
A
A
A
A
CSAAT = 0 and CSNAAT = 0
CSAAT = 0 and CSNAAT = 0
A mode fault is detected when the SPI is programmed in Master Mode and a low level is driven
by an external master on the NPCS0/NSS signal. In this case, multi-master configuration,
NPCS0, MOSI, MISO and SPCK pins must be configured in open drain (through the PIO control-
ler). When a mode fault is detected, the MODF bit in the SPI_SR is set until the SPI_SR is read
DLYBCT
DLYBCT
DLYBCT
DLYBCT
DLYBCS
DLYBCS
DLYBCS
PCS = B
PCS=A
A
PCS = A
A
B
A
PCS = A
A
A
A
A
CSAAT = 0 and CSNAAT = 1
CSAAT = 1 and CSNAAT= 0 / 1
DLYBCT
DLYBCT
DLYBCT
DLYBCT
SAM3S Preliminary
SAM3S Preliminary
DLYBCS
DLYBCS
PCS = B
PCS = A
DLYBCS
A
A
PCS = A
DLYBCS
A
A
A
B
595
595

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