AT32UC3B1256-Z1UR Atmel, AT32UC3B1256-Z1UR Datasheet - Page 372

• Manufacturer Part Number: AT32UC3B1256-Z1UR
• Description: MCU AVR32 256K FLASH 48-QFN
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B1256-Z1UR

• Package / Case: 48-QFN Exposed Pad
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 28
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Program Memory Size: 256KB (256K x 8)
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.7
22.7.1
22.7.1.1
22.7.1.2
32059J–12/2010
Functional Description
USB General Operation
Introduction
Power-On and reset
After a hardware reset, the USBB is disabled. When enabled, the USBB runs either in device
mode or in host mode according to the ID detection.
If the USB_ID pin is not connected to ground, the USB_ID Pin State bit in the General Status
register (USBSTA.ID) is set (the internal pull-up resistor of the USB_ID pin must be enabled by
the I/O Controller) and device mode is engaged.
The USBSTA.ID bit is cleared when a low level has been detected on the USB_ID pin. Host
mode is then engaged.
Figure 22-5 on page 372
Figure 22-5. General States
After a hardware reset, the USBB is in the Reset state. In this state:
• The macro is disabled. The USBB Enable bit in the General Control register (USBCON.USBE)
• The macro clock is stopped in order to minimize power consumption. The Freeze USB Clock
• The pad is in suspend mode.
• The internal states and registers of the device and host modes are reset.
• The DPRAM is not cleared and is accessible.
• The USBSTA.ID bit and the VBus Level bit in the UBSTA (UBSTA.VBUS) reflect the states of
• The OTG Pad Enable (OTGPADE) bit, the VBus Polarity (VBUSPO) bit, the FRZCLK bit, the
is zero.
bit in USBCON (USBON.FRZCLK) is set.
the USB_ID and USB_VBUS input pins.
USBE bit, the USB_ID Pin Enable (UIDE) bit, the USBB Mode (UIMOD) bit in USBCON, and
the Low-Speed Mode Force bit in the Device General Control (UDCON.LS) register can be
written by software, so that the user can program pads and speed before enabling the macro,
but their value is only taken into account once the macro is enabled and unfrozen.
describes the USBB main states.
Clock stopped:
FRZCLK = 1
Device
Macro off:
USBE = 0
USBE = 1
ID = 1
USBE = 0
Reset
USBE = 1
ID = 0
USBE = 0
USBE = 0
Host
RESET
HW
<any
other
state>
AT32UC3B
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