ATTINY84-15MZ Atmel, ATTINY84-15MZ Datasheet - Page 21

MCU AVR 8K FLASH 15MHZ 20-QFN

ATTINY84-15MZ

Manufacturer Part Number
ATTINY84-15MZ
Description
MCU AVR 8K FLASH 15MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY84-15MZ

Package / Case
20-QFN Exposed Pad
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
12
Eeprom Size
512 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
512 x 8
Program Memory Size
8KB (8K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY84-15MZ
Manufacturer:
ATMEL
Quantity:
480
Part Number:
ATTINY84-15MZ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
6.4
6.4.1
7701D–AVR–09/10
I/O Memory
General Purpose I/O Registers
The I/O space definition of the Atmel
page
All Atmel ATtiny24/44/84 I/Os and peripherals are placed in the I/O space. All I/O locations
may be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data
between the 32 general purpose working registers and the I/O space. I/O registers within the
address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instruc-
tions. See the instruction set summary for more details. When using the I/O specific
commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
registers as data space using LD and ST instructions, 0x20 must be added to these
addresses.
For compatibility with future devices, reserved bits should be written with a logical zero if
accessed. Reserved I/O memory addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that, unlike most
other AVR
therefore, be used on registers containing such status flags. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATtiny24/44/84 contains three General Purpose I/O Registers. These registers can be
used for storing any information, and they are particularly useful for storing global variables
and status flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are
directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
210.
®
s, the CBI and SBI instructions will only operate on the specified bit, and can,
Atmel ATtiny24/44/84 [Preliminary]
®
ATtiny24/44/84 is shown in
“Register Summary” on
21

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