ATA6617-P3QW Atmel, ATA6617-P3QW Datasheet - Page 76

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ATA6617-P3QW

Manufacturer Part Number
ATA6617-P3QW
Description
MCU W/LIN TX/5V REG/WTCDG 38VQFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6617-P3QW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ATA6617-P3QW
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4.7.2
4.7.2.1
4.7.3
4.7.3.1
76
Atmel ATA6616/ATA6617
Internal Voltage Reference
Watchdog Timer
Voltage Reference Enable Signals and Start-up Time
Watchdog Timer Behavior
Atmel
Brown-out Detection, and it can be used as an input to the Analog Comparator or the ADC.
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in
turned on. The reference is on during the following situations:
Thus, when the BOD is not enabled, after setting the ACIRS bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode or in Power-save, the user
can avoid the three conditions above to ensure that the reference is turned off before entering
in these power reduction modes.
Atmel
The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128 KHz
oscillator.
1. When the BOD is enabled (by programming the BODLEVEL [2:0] Fuses).
2. When the bandgap reference is connected to the Analog Comparator (by setting the
3. When the ADC is enabled.
Clocked from separate On-chip Oscillator
4 Operating modes
Selectable Time-out period from 16ms to 8s
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
– Interrupt
– System Reset
– Interrupt and System Reset
– Clock Monitoring
ACIRS bit in ACSR).
®
®
ATtiny87/167 has an Enhanced Watchdog Timer (WDT). The main features are:
ATtiny87/167 features an internal bandgap reference. This reference is used for
Table 4-87 on page
271. To save power, the reference is not always
9132D–AUTO–12/10

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