ATA6617-P3QW Atmel, ATA6617-P3QW Datasheet - Page 70

• Manufacturer Part Number: ATA6617-P3QW
• Description: MCU W/LIN TX/5V REG/WTCDG 38VQFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6617-P3QW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.6.9.2
4.6.9.3
70
Atmel ATA6616/ATA6617
MCUCR – MCU Control Register
PRR – Power Reduction Register
Table 4-17.
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the pro-
grammer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one just before
the execution of the SLEEP instruction and to clear it immediately after waking up.
• Bit 6 – BODS: BOD Sleep
The BODS bit must be written to logic one in order to turn off BOD during sleep, see
4-16 on page
BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must
first be set to one. Then, to set the BODS bit, BODS must be set to one and BODSE must be
set to zero within four clock cycles.
The BODS bit is active three clock cycles after it is set. A sleep instruction must be executed
while BODS is active in order to turn off the BOD for the actual sleep mode. The BODS bit is
automatically cleared after three clock cycles.
• Bit 5 – BODSE: BOD Sleep Enable
BODSE enables setting of BODS control bit, as explained in BODS bit description. BOD dis-
able is controlled by a timed sequence.
• Bit 7 - Res: Reserved bit
This bit is reserved in Atmel
• Bit 6 - Res: Reserved bit
This bit is reserved in Atmel ATtiny87/167 and will always read as zero.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
SM1
0
0
1
1
65. Writing to the BODS bit is controlled by a timed sequence and an enable bit,
Sleep Mode Select
R
7
–
0
R
7
–
0
SM0
BODS
0
1
0
1
R/W
6
0
R
6
–
0
®
ATtiny87/167 and will always read as zero.
BODSE
PRLIN
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
R/W
R/W
5
0
5
0
PRSPI
R/W
PUD
R/W
4
0
4
0
PRTIM1
R/W
3
0
R
3
–
0
PRTIM0
R/W
2
0
R
2
–
0
PRUSI
R/W
R
1
–
0
1
0
PRADC
9132D–AUTO–12/10
R/W
R
0
–
0
0
0
MCUCR
PRR
Table