ATTINY25-15MZ Atmel, ATTINY25-15MZ Datasheet - Page 84

• Manufacturer Part Number: ATTINY25-15MZ
• Description: MCU AVR 2K FLASH 15MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY25-15MZ

• Package / Case: 20-QFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 6
• Eeprom Size: 128 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 2KB (2K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: UART, SPI, USI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Data Rom Size: 128 B
• A/d Bit Size: 10 bit
• A/d Channels Available: 4
• Height: 0.75 mm
• Length: 4 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 4 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.1.1
84
ATtiny25/45/85
Timer/Counter1 Control Register - TCCR1
• Bit 7- CTC1 : Clear Timer/Counter on Compare Match
When the CTC1 control bit is set (one), Timer/Counter1 is reset to $00 in the CPU clock cycle
after a compare match with OCR1C register value. If the control bit is cleared, Timer/Counter1
continues counting and is unaffected by a compare match.
• Bit 6- PWM1A: Pulse Width Modulator A Enable
When set (one) this bit enables PWM mode based on comparator OCR1A in Timer/Counter1
and the counter value is reset to $00 in the CPU clock cycle after a compare match with OCR1C
register value.
• Bits 5,4 - COM1A1, COM1A0: Comparator A Output Mode, Bits 1 and 0
The COM1A1 and COM1A0 control bits determine any output pin action following a compare
match with compare register A in Timer/Counter1. Output pin actions affect pin PB1 (OC1A).
Since this is an alternative function to an I/O port, the corresponding direction control bit must be
set (one) in order to control an output pin. Note that OC1A is not connected in normal mode.
Table 14-1.
In PWM mode, these bits have different functions. Refer to
description.
• Bits 3 .. 0 - CS13, CS12, CS11, CS10: Clock Select Bits 3, 2, 1, and 0
The Clock Select bits 3, 2, 1, and 0 define the prescaling source of Timer/Counter1.
Table 14-2.
Bit
$30 ($50)
Read/Write
Initial value
COM1A1
CS13
0
0
1
1
0
0
0
0
0
0
0
CTC1
Comparator A Mode Select
Timer/Counter1 Prescale Select
R/W
COM1A0
7
0
0
1
0
1
CS12
0
0
0
0
1
1
1
PWM1A
R/W
6
0
Description
Timer/Counter Comparator A disconnected from output pin OC1A.
Toggle the OC1A output line.
Clear the OC1A output line.
Set the OC1A output line
COM1A1
CS11
R/W
0
0
1
1
0
0
1
5
0
COM1A0
R/W
4
0
CS10
0
1
0
1
0
1
0
CS13
R/W
3
0
Asynchronous
Clocking Mode
T/C1 stopped
PCK
PCK/2
PCK/4
PCK/8
PCK/16
PCK/32
Table 14-4 on page 90
CS12
R/W
2
0
CS11
R/W
1
0
Synchronous
Clocking Mode
T/C1 stopped
CK
CK/2
CK/4
CK/8
CK/16
CK/32
CS10
R/W
0
0
7598H–AVR–07/09
for a detailed
TCCR1