ATTINY25-15MZ Atmel, ATTINY25-15MZ Datasheet - Page 28

• Manufacturer Part Number: ATTINY25-15MZ
• Description: MCU AVR 2K FLASH 15MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY25-15MZ

• Package / Case: 20-QFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 6
• Eeprom Size: 128 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 2KB (2K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: UART, SPI, USI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Data Rom Size: 128 B
• A/d Bit Size: 10 bit
• A/d Channels Available: 4
• Height: 0.75 mm
• Length: 4 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 4 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.7.1
6.8
28
128 kHz Internal Oscillator
ATtiny25/45/85
High Frequency PLL Clock - PLL
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
29
There is an internal PLL that provides nominally 64 MHz clock rate locked to the RC Oscillator
for the use of the Peripheral Timer/Counter1 and for the system clock source. When selected as
a system clock source, by programming the CKSEL fuses to ‘0001’, it is divided by four like
shown in
SUT fuses as shown in
Table 6-10.
Table 6-11.
The 128 kHz internal Oscillator is a low power Oscillator providing a clock of 128 kHz. The fre-
quency is nominal at 3V and 25°C. This clock may be select as the system clock by
programming the CKSEL Fuses to “11”.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 6-12.
SUT1..0
SUT1..0
for details.
00
01
10
11
00
01
10
11
6-12.
Table
Power-down and Power-save
CKSEL3..0
Start-up Time from Power
PLLCK Operating Modes
Start-up Times for the PLLCK
Start-up Times for the 128 kHz Internal Oscillator
6-10. When this clock source is selected, start-up times are determined by the
Down and Power Save
0001
Start-up Time from
CLK
16K CK
16K CK
Table
1K CK
1K CK
6 CK
6 CK
6 CK
6-11. See also
“PCK Clocking System” on page
Additional Delay from
Additional Delay from
Reset (V
Reserved
14CK + 68 ms
14CK + 68 ms
14CK + 64 ms
14CK + 4 ms
14CK + 8ms
14CK + 8ms
Reset
14CK
CC
Nominal Frequency
= 5.0V)
“System Clock Prescaler” on page
16 MHz
Recommended usage
BOD enabled
Fast rising power
Slowly rising power
Slowly rising power
BOD enabled
Fast rising power
Slowly rising power
Recommended Usage
23.
7598H–AVR–07/09