ATTINY25-15MZ Atmel, ATTINY25-15MZ Datasheet - Page 72

• Manufacturer Part Number: ATTINY25-15MZ
• Description: MCU AVR 2K FLASH 15MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY25-15MZ

• Package / Case: 20-QFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 6
• Eeprom Size: 128 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 2KB (2K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: UART, SPI, USI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Data Rom Size: 128 B
• A/d Bit Size: 10 bit
• A/d Channels Available: 4
• Height: 0.75 mm
• Length: 4 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 4 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.8
12.8.1
72
8-bit Timer/Counter Register Description
ATtiny25/45/85
Timer/Counter Control Register A – TCCR0A
Figure 12-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
• Bits 7:6 – COM01A:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A1:0
bits are set, the OC0A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0A pin
must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 12-1.
Table 12-2
mode.
Table 12-2.
Bit
Read/Write
Initial Value
COM01
COM01
TCNTn
(clk
OCRnx
(CTC)
OCFnx
clk
clk
0
0
1
1
0
I/O
I/O
Tn
/8)
shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM
COM0A1
caler (f
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
R/W
7
0
COM00
COM00
0
1
0
1
0
clk_I/O
Table 12-1
COM0A0
TOP - 1
R/W
6
0
/8)
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
Description
Normal port operation, OC0A disconnected.
COM0B1
shows the COM0A1:0 bit functionality when the WGM02:0 bits
R/W
5
0
COM0B0
R/W
TOP
4
0
TOP
R
3
0
–
(1)
BOTTOM
R
2
–
0
WGM01
R/W
1
0
BOTTOM + 1
WGM00
R/W
0
0
7598H–AVR–07/09
TCCR0A