ATMEGA8L-8AUR Atmel, ATMEGA8L-8AUR Datasheet - Page 41
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ATMEGA8L-8AUR
Manufacturer Part Number
ATMEGA8L-8AUR
Description
MCU AVR 8KB FLASH 8MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8L-8MU.pdf
(302 pages)
Specifications of ATMEGA8L-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8L-8AUR
Manufacturer:
Atmel
Quantity:
3 915
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Watchdog Reset
MCU Control and
Status Register –
MCUCSR
2486Z–AVR–02/11
When the Watchdog times out, it will generate a short reset pulse of 1 CK cycle duration. On the
falling edge of this pulse, the delay timer starts counting the time-out period t
43
Figure 19. Watchdog Reset During Operation
The MCU Control and Status Register provides information on which reset source caused an
MCU Reset.
• Bit 7..4 – Res: Reserved Bits
These bits are reserved bits in the ATmega8 and always read as zero.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 0 – PORF: Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag.
To make use of the Reset Flags to identify a reset condition, the user should read and then reset
the MCUCSR as early as possible in the program. If the register is cleared before another reset
occurs, the source of the reset can be found by examining the Reset Flags.
Bit
Read/Write
Initial Value
for details on operation of the Watchdog Timer.
CC
R
7
–
0
R
6
–
0
R
5
–
0
CK
R
4
–
0
WDRF
R/W
3
See Bit Description
BORF
R/W
2
EXTRF
R/W
1
PORF
ATmega8(L)
R/W
0
TOUT
MCUCSR
. Refer to
page
41
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