ATMEGA8L-8AUR Atmel, ATMEGA8L-8AUR Datasheet - Page 202

• Manufacturer Part Number: ATMEGA8L-8AUR
• Description: MCU AVR 8KB FLASH 8MHZ 32TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8L-8AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Package: 32TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 23
• Interface Type: SPI/TWI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Boot Loader
Support – Read-
While-Write
Self-
Programming
Boot Loader
Features
Application and
Boot Loader Flash
Sections
Application Section
BLS – Boot Loader
Section
Read-While-Write
and No Read-
While-Write Flash
Sections
202
ATmega8(L)
The Boot Loader Support provides a real Read-While-Write Self-Programming mechanism for
downloading and uploading program code by the MCU itself. This feature allows flexible applica-
tion software updates controlled by the MCU using a Flash-resident Boot Loader program. The
Boot Loader program can use any available data interface and associated protocol to read code
and write (program) that code into the Flash memory, or read the code from the Program mem-
ory. The program code within the Boot Loader section has the capability to write into the entire
Flash, including the Boot Loader Memory. The Boot Loader can thus even modify itself, and it
can also erase itself from the code if the feature is not needed anymore. The size of the Boot
Loader Memory is configurable with fuses and the Boot Loader has two separate sets of Boot
Lock Bits which can be set independently. This gives the user a unique flexibility to select differ-
ent levels of protection.
•
•
•
•
•
•
•
Note:
The Flash memory is organized in two main sections, the Application section and the Boot
loader section (see
the BOOTSZ Fuses as shown in
sections can have different level of protection since they have different sets of Lock Bits.
The application section is the section of the Flash that is used for storing the application code.
The protection level for the application section can be selected by the application boot Lock Bits
(Boot Lock Bits 0), see
Loader code since the SPM instruction is disabled when executed from the application section.
While the application section is used for storing the application code, the The Boot Loader soft-
ware must be located in the BLS since the SPM instruction can initiate a programming when
executing from the BLS only. The SPM instruction can access the entire Flash, including the
BLS itself. The protection level for the Boot Loader section can be selected by the Boot Loader
Lock Bits (Boot Lock Bits 1), see
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader soft-
ware update is dependent on which address that is being programmed. In addition to the two
sections that are configurable by the BOOTSZ Fuses as described above, the Flash is also
divided into two fixed sections, the Read-While-Write (RWW) section and the No Read-While-
Write (NRWW) section. The limit between the RWW- and NRWW sections is given in
on page 214
•
•
Note that the user software can never read any code that is located inside the RWW section dur-
ing a Boot Loader software operation. The syntax “Read-While-Write section” refers to which
section that is being programmed (erased or written), not which section that actually is being
read during a Boot Loader software update.
Read-While-Write Self-Programming
Flexible Boot Memory Size
High Security (Separate Boot Lock Bits for a Flexible Protection)
Separate Fuse to Select Reset Vector
Optimized Page
Code Efficient Algorithm
Efficient Read-Modify-Write Support
When erasing or writing a page located inside the RWW section, the NRWW section can be
read during the operation
When erasing or writing a page located inside the NRWW section, the CPU is halted during
the entire operation
1. A page is a section in the Flash consisting of several bytes (see
during programming. The page organization does not affect normal operation
and
(1)
Figure 102 on page
Size
Figure 102 on page
Table 78 on page
Table 82 on page 213
Table 79 on page
204. The main difference between the two sections is:
204). The size of the different sections is configured by
205. The application section can never store any Boot
205.
and
Figure 102 on page
Table 89 on page 218
204. These two
2486Z–AVR–02/11
Table 83
)
used