ATMEGA8L-8AUR Atmel, ATMEGA8L-8AUR Datasheet - Page 17
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATMEGA8L-8AUR
Manufacturer Part Number
ATMEGA8L-8AUR
Description
MCU AVR 8KB FLASH 8MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8L-8MU.pdf
(302 pages)
Specifications of ATMEGA8L-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8L-8AUR
Manufacturer:
Atmel
Quantity:
3 915
- Current page: 17 of 302
- Download datasheet (6Mb)
AVR ATmega8
Memories
In-System
Reprogrammable
Flash Program
Memory
2486Z–AVR–02/11
This section describes the different memories in the Atmel
ture has two main memory spaces, the Data memory and the Program Memory space. In
addition, the ATmega8 features an EEPROM Memory for data storage. All three memory spaces
are linear and regular.
The ATmega8 contains 8Kbytes On-chip In-System Reprogrammable Flash memory for pro-
gram storage. Since all AVR instructions are 16-bits or 32-bits wide, the Flash is organized as
4K × 16 bits. For software security, the Flash Program memory space is divided into two sec-
tions, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega8 Pro-
gram Counter (PC) is 12 bits wide, thus addressing the 4K Program memory locations. The
operation of Boot Program section and associated Boot Lock Bits for software protection are
described in detail in
202.
ming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire Program memory address space (see the
LPM – Load Program memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 7. Program Memory Map
“Memory Programming” on page 215
13.
“Boot Loader Support – Read-While-Write Self-Programming” on page
Application Flash Section
Boot Flash Section
contains a detailed description on Flash Program-
®
AVR
®
ATmega8. The AVR architec-
$000
$FFF
“Instruction Execution Tim-
ATmega8(L)
17
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