MC68HC908JL8CSPE Freescale Semiconductor, MC68HC908JL8CSPE Datasheet - Page 156

IC MCU 8K FLASH 8MHZ 32-DIP

MC68HC908JL8CSPE

Manufacturer Part Number
MC68HC908JL8CSPE
Description
IC MCU 8K FLASH 8MHZ 32-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC68HC908JL8CSPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
26
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-SDIP (0.400", 10.16mm)
Controller Family/series
HC08
No. Of I/o's
26
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08JL
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908JL16E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Input/Output (I/O) Ports
11.3 Port B
Port B is an 8-bit special function port that shares all of its port pins with the analog-to-digital converter
(ADC) module, see
11.3.1 Port B Data Register (PTB)
The port B data register contains a data latch for each of the eight port B pins.
PTB[7:0] — Port B Data Bits
ADC7–ADC0 — ADC channels 7 to 0
11.3.2 Data Direction Register B (DDRB)
Data direction register B determines whether each port B pin is an input or an output. Writing a logic 1 to
a DDRB bit enables the output buffer for the corresponding port B pin; a logic 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
156
These read/write bits are software programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
ADC7–ADC0 are pins used for the input channels to the analog-to-digital converter module. The
channel select bits, ADCH[4:0], in the ADC status and control register define which port pin will be used
as an ADC input and overrides any control from the port I/O logic. See
Converter
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
Alternative Functions:
Address:
(ADC).
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
port B I/O logic.
Reset:
Read:
Write:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Address:
Chapter 10
Reset:
Read:
Write:
DDRB7
$0005
Bit 7
0
Figure 11-8. Data Direction Register B (DDRB)
$0001
PTB7
ADC7
Bit 7
Figure 11-7. Port B Data Register (PTB)
DDRB6
6
0
PTB6
ADC6
6
DDRB5
5
0
ADC5
PTB5
5
NOTE
DDRB4
4
0
Unaffected by reset
ADC4
PTB4
4
DDRB3
3
0
ADC3
PTB3
3
Figure 11-9
DDRB2
2
0
ADC2
PTB2
Chapter 10 Analog-to-Digital
2
DDRB1
shows the
1
0
ADC2
PTB1
1
Freescale Semiconductor
DDRB0
Bit 0
0
PTB0
ADC0
Bit 0

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