MC68HC908JL8CSPE Freescale Semiconductor, MC68HC908JL8CSPE Datasheet - Page 151

IC MCU 8K FLASH 8MHZ 32-DIP

MC68HC908JL8CSPE

Manufacturer Part Number
MC68HC908JL8CSPE
Description
IC MCU 8K FLASH 8MHZ 32-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC68HC908JL8CSPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
26
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-SDIP (0.400", 10.16mm)
Controller Family/series
HC08
No. Of I/o's
26
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08JL
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908JL16E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Chapter 11
Input/Output (I/O) Ports
11.1 Introduction
Twenty six (26) bidirectional input-output (I/O) pins form four parallel ports. All I/O pins are programmable
as inputs or outputs.
Freescale Semiconductor
Addr.
$000C
$000A
$0000
$0001
$0003
$0004
$0005
$0007
$0008
Port D Data Register (PTD)
Port A Data Register (PTA)
Port B Data Register (PTB)
Port D Control Register
Data Direction Register D
Data Direction Register A
Data Direction Register B
Data Direction Register E
Register Name
Port E Data Register
Connect any unused I/O pins to an appropriate logic level, either V
V
termination reduces excess current consumption and the possibility of
electrostatic damage.
SS
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
. Although the I/O ports do not require termination for proper operation,
(PDCR)
(DDRD)
(DDRA)
(DDRB)
(DDRE)
(PTE)
Reset:
Read:
Write:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Figure 11-1. I/O Port Register Summary
DDRA7
DDRB7
DDRD7
PTD7
PTA7
PTB7
Bit 7
0
0
0
0
0
0
DDRA6
DDRB6
DDRD6
PTD6
PTA6
PTB6
0
6
0
0
0
0
0
NOTE
DDRA5
DDRB5
DDRD5
PTD5
PTA5
PTB5
0
5
0
0
0
0
0
DDRA4
DDRB4
DDRD4
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
PTA4
PTB4
PTD4
0
4
0
0
0
0
0
SLOWD7 SLOWD6 PTDPU7
DDRA3
DDRB3
DDRD3
PTA3
PTB3
PTD3
3
0
0
0
0
0
DDRD2
DDRA2
DDRB2
PTA2
PTB2
PTD2
2
0
0
0
0
0
DD
or
DDRD1
DDRA1
DDRB1
DDRE1
PTA1
PTB1
PTD1
PTE1
1
0
0
0
0
0
PTDPU6
DDRD0
DDRE0
DDRA0
DDRB0
PTA0
PTB0
PTD0
PTE0
Bit 0
0
0
0
0
0
151

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