Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 88

• Manufacturer Part Number: Z8F083ASJ020EG
• Description: IC ENCORE XP MCU FLASH 8K 28SOIC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F083ASJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4558-5

PS026308-1207
COMPARE Mode
In COMPARE mode, the timer counts up to 16-bit maximum compare value stored in the
timer reload high and low byte registers. The timer input is the system clock. On reaching
the compare value, the timer generates an interrupt and counting continues (the timer
value is not reset to
timer output pin changes state (from low to high or from high to low) upon compare.
If the timer reaches
The steps for configuring a timer for COMPARE mode and for initiating the count are as
follows:
1. Write to the timer control register to:
2. Write to the timer high and low byte registers to set the starting count value.
3. Write to the timer reload high and low byte registers to set the compare value.
4. Enable the timer interrupt and set the timer interrupt priority by writing to the relevant
5. If using the timer output function, configure the associated GPIO port pin for the timer
6. Write to the timer control register to enable the timer and initiate counting.
In COMPARE mode, the system clock always provides the timer input. The compare time
is calculated by the following equation:
GATED Mode
In GATED mode, the timer counts only when the timer input signal is in its active state
(asserted), as determined by the TPOL bit in the timer control register. When the timer
input signal is asserted, counting begins. A timer interrupt is generated when the timer
input signal is deasserted or a timer reload occurs. To determine whether the timer input
signal deassertion generated the interrupt, read the associated GPIO input value and
compare to the value stored in the TPOL bit.
The timer counts up to the 16-bit reload value stored in the timer reload high and low byte
registers. The timer input is the system clock. On reaching the reload value, the timer
generates an interrupt, the count value in the timer high and low byte registers is reset to
0001H
Compare Mode Time (s)
–
–
–
–
interrupt registers.
output alternate function.
and counting resumes (assuming the timer input signal remains asserted). Also, if
Disable the timer
Configure the timer for COMPARE mode
Set the prescale value
Set the initial logic level (high or low) for the timer output alternate function
FFFFH
0001H
). Also, if the timer output alternate function is enabled, the
, the timer resets to
=
------------------------------------------------------------------------------------------------------ -
Compare Value Start Value
System Clock Frequency (Hz)
0000H
–
and continues counting.
Z8 Encore!
Product Specification
Prescale
®
F083A Series
Timers
76