Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 143

IC ENCORE XP MCU FLASH 8K 28SOIC

Z8F083ASJ020EG

Manufacturer Part Number
Z8F083ASJ020EG
Description
IC ENCORE XP MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F083ASJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
269-4558-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F083ASJ020EG
Manufacturer:
Zilog
Quantity:
363
Table 89. Read Status Byte
BITS
FIELD
DEFAULT
VALUE
PS026308-1207
Power Failure Protection
Because of the Flash memory architecture, NVDS reads exhibit a non-uniform execution
time. A read operation takes between 71 s and 258 s (assuming a 20 MHz system
clock). Slower system clock speeds result in proportionally higher execution times.
NVDS byte reads from invalid addresses (those exceeding the NVDS array size) return
0xff
The status byte returned by the NVDS read routine is zero for successful read. If the status
byte is non-zero, there is a corrupted value in the NVDS array at the location being read.
In this case, the value returned in R0 is the byte most recently written to the array that does
not have an error.
The NVDS routines employ error checking mechanisms to ensure a power failure
endangers only for the most recently written byte. Bytes previously written to the array are
not perturbed. For this protection to function, the VBO must be enabled (See
Modes
Bit Address Space
A system reset (such as a pin reset or Watchdog Timer reset) that occurs during a Write
operation also perturbs the byte currently being written. All other bytes in the array are
unperturbed.
7
0
Reserved—Must be 0.
DE—Data Error
When reading a NVDS address, if an error is found in the latest data corresponding to
this NVDS address, this bit is set to 1. NVDS source code steps forward until finding
a valid data at this address.
FE—Flash Error
If Flash error is detected, this bit is set to 1.
IGADDR—Illegal address
When NVDS byte reads from invalid addresses (those exceeding the NVDS array
size) occur, this bit is set to 1.
. Illegal read operations have a 6 s execution time.
on page 33) and configured for a threshold voltage of 2.4 V or greater (See
Reserved
6
0
on page 124).
5
0
DE
4
0
Reserved
3
0
Z8 Encore!
FE
2
0
Product Specification
Non Volatile Data Storage
IGADDR Reserved
®
1
0
F083A Series
Low-Power
Trim
0
0
131

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