Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 71

• Manufacturer Part Number: Z8F083ASJ020EG
• Description: IC ENCORE XP MCU FLASH 8K 28SOIC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F083ASJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4558-5

Table 34. Interrupt Request 2 Register (IRQ2)
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
Interrupt Request 2 Register
IRQ0 Enable High and Low Bit Registers
R/W
7
0
PA7I—Port A7
0 = No interrupt request is pending for GPIO Port A.
1 = An interrupt request from GPIO Port A.
PA6CI—Port A6 or comparator interrupt request
0 = No interrupt request is pending for GPIO Port A or comparator.
1 = An interrupt request from GPIO Port A or comparator.
PAxI—Port A Pin x interrupt request
0 = No interrupt request is pending for GPIO Port A pin x.
1 = An interrupt request from GPIO Port A pin x is awaiting service.
where x indicates the specific GPIO port pin number (0–5).
The interrupt request 2 (IRQ2) register stores interrupt requests for both vectored and
polled interrupts. See
corresponding bit in the IRQ2 register becomes 1. If interrupts are globally enabled
(vectored interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU. If
interrupts are globally disabled (polled interrupts), the eZ8 CPU reads the interrupt request
2 register to determine if any interrupt requests are pending.
Reserved—Must be 0.
PCxI—Port C pin x interrupt request
0 = No interrupt request is pending for GPIO Port C pin x.
1 = An interrupt request from GPIO Port C pin x is awaiting service.
where x indicates the specific GPIO Port C pin number (0–3).
Table 35
low bit registers
on page 60 describes the priority control for IRQ0. The IRQ0 enable high and
R/W
6
0
Reserved
(Table 36
Table
R/W
5
0
and
34. When a request is sent to the interrupt controller, the
Table 37
R/W
4
0
FC6H
on page 60) form a priority encoded enabling for
PC3I
R/W
3
0
PC2I
R/W
Z8 Encore!
2
0
Product Specification
PC1I
R/W
1
0
®
Interrupt Controller
F083A Series
PC0I
R/W
0
0
59